1 /* 2 * Copyright (c) 2017-2018 Cavium, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 * 27 */ 28 29 #ifndef __ECORE_HW_H__ 30 #define __ECORE_HW_H__ 31 32 #include "ecore.h" 33 #include "ecore_dev_api.h" 34 35 /* Forward decleration */ 36 struct ecore_ptt; 37 38 enum reserved_ptts { 39 RESERVED_PTT_EDIAG, 40 RESERVED_PTT_USER_SPACE, 41 RESERVED_PTT_MAIN, 42 RESERVED_PTT_DPC, 43 RESERVED_PTT_MAX 44 }; 45 46 /* @@@TMP - in earlier versions of the emulation, the HW lock started from 1 47 * instead of 0, this should be fixed in later HW versions. 48 */ 49 #ifndef MISC_REG_DRIVER_CONTROL_0 50 #define MISC_REG_DRIVER_CONTROL_0 MISC_REG_DRIVER_CONTROL_1 51 #endif 52 #ifndef MISC_REG_DRIVER_CONTROL_0_SIZE 53 #define MISC_REG_DRIVER_CONTROL_0_SIZE MISC_REG_DRIVER_CONTROL_1_SIZE 54 #endif 55 56 enum _dmae_cmd_dst_mask { 57 DMAE_CMD_DST_MASK_NONE = 0, 58 DMAE_CMD_DST_MASK_PCIE = 1, 59 DMAE_CMD_DST_MASK_GRC = 2 60 }; 61 62 enum _dmae_cmd_src_mask { 63 DMAE_CMD_SRC_MASK_PCIE = 0, 64 DMAE_CMD_SRC_MASK_GRC = 1 65 }; 66 67 enum _dmae_cmd_crc_mask { 68 DMAE_CMD_COMP_CRC_EN_MASK_NONE = 0, 69 DMAE_CMD_COMP_CRC_EN_MASK_SET = 1 70 }; 71 72 /* definitions for DMA constants */ 73 #define DMAE_GO_VALUE 0x1 74 75 #ifdef __BIG_ENDIAN 76 #define DMAE_COMPLETION_VAL 0xAED10000 77 #define DMAE_CMD_ENDIANITY 0x3 78 #else 79 #define DMAE_COMPLETION_VAL 0xD1AE 80 #define DMAE_CMD_ENDIANITY 0x2 81 #endif 82 83 #define DMAE_CMD_SIZE 14 84 /* size of DMAE command structure to fill.. DMAE_CMD_SIZE-5 */ 85 #define DMAE_CMD_SIZE_TO_FILL (DMAE_CMD_SIZE - 5) 86 /* Minimum wait for dmae opertaion to complete 2 milliseconds */ 87 #define DMAE_MIN_WAIT_TIME 0x2 88 #define DMAE_MAX_CLIENTS 32 89 90 /** 91 * @brief ecore_ptt_invalidate - Forces all ptt entries to be re-configured 92 * 93 * @param p_hwfn 94 */ 95 void ecore_ptt_invalidate(struct ecore_hwfn *p_hwfn); 96 97 /** 98 * @brief ecore_ptt_pool_alloc - Allocate and initialize PTT pool 99 * 100 * @param p_hwfn 101 * 102 * @return _ecore_status_t - success (0), negative - error. 103 */ 104 enum _ecore_status_t ecore_ptt_pool_alloc(struct ecore_hwfn *p_hwfn); 105 106 /** 107 * @brief ecore_ptt_pool_free - 108 * 109 * @param p_hwfn 110 */ 111 void ecore_ptt_pool_free(struct ecore_hwfn *p_hwfn); 112 113 /** 114 * @brief ecore_ptt_get_bar_addr - Get PPT's external BAR address 115 * 116 * @param p_hwfn 117 * @param p_ptt 118 * 119 * @return u32 120 */ 121 u32 ecore_ptt_get_bar_addr(struct ecore_ptt *p_ptt); 122 123 /** 124 * @brief ecore_ptt_set_win - Set PTT Window's GRC BAR address 125 * 126 * @param p_hwfn 127 * @param new_hw_addr 128 * @param p_ptt 129 */ 130 void ecore_ptt_set_win(struct ecore_hwfn *p_hwfn, 131 struct ecore_ptt *p_ptt, 132 u32 new_hw_addr); 133 134 /** 135 * @brief ecore_get_reserved_ptt - Get a specific reserved PTT 136 * 137 * @param p_hwfn 138 * @param ptt_idx 139 * 140 * @return struct ecore_ptt * 141 */ 142 struct ecore_ptt *ecore_get_reserved_ptt(struct ecore_hwfn *p_hwfn, 143 enum reserved_ptts ptt_idx); 144 145 /** 146 * @brief ecore_wr - Write value to BAR using the given ptt 147 * 148 * @param p_hwfn 149 * @param p_ptt 150 * @param hw_addr 151 * @param val 152 */ 153 void ecore_wr(struct ecore_hwfn *p_hwfn, 154 struct ecore_ptt *p_ptt, 155 u32 hw_addr, 156 u32 val); 157 158 /** 159 * @brief ecore_rd - Read value from BAR using the given ptt 160 * 161 * @param p_hwfn 162 * @param p_ptt 163 * @param hw_addr 164 */ 165 u32 ecore_rd(struct ecore_hwfn *p_hwfn, 166 struct ecore_ptt *p_ptt, 167 u32 hw_addr); 168 169 /** 170 * @brief ecore_memcpy_from - copy n bytes from BAR using the given 171 * ptt 172 * 173 * @param p_hwfn 174 * @param p_ptt 175 * @param dest 176 * @param hw_addr 177 * @param n 178 */ 179 void ecore_memcpy_from(struct ecore_hwfn *p_hwfn, 180 struct ecore_ptt *p_ptt, 181 void *dest, 182 u32 hw_addr, 183 osal_size_t n); 184 185 /** 186 * @brief ecore_memcpy_to - copy n bytes to BAR using the given 187 * ptt 188 * 189 * @param p_hwfn 190 * @param p_ptt 191 * @param hw_addr 192 * @param src 193 * @param n 194 */ 195 void ecore_memcpy_to(struct ecore_hwfn *p_hwfn, 196 struct ecore_ptt *p_ptt, 197 u32 hw_addr, 198 void *src, 199 osal_size_t n); 200 /** 201 * @brief ecore_fid_pretend - pretend to another function when 202 * accessing the ptt window. There is no way to unpretend 203 * a function. The only way to cancel a pretend is to 204 * pretend back to the original function. 205 * 206 * @param p_hwfn 207 * @param p_ptt 208 * @param fid - fid field of pxp_pretend structure. Can contain 209 * either pf / vf, port/path fields are don't care. 210 */ 211 void ecore_fid_pretend(struct ecore_hwfn *p_hwfn, 212 struct ecore_ptt *p_ptt, 213 u16 fid); 214 215 /** 216 * @brief ecore_port_pretend - pretend to another port when 217 * accessing the ptt window 218 * 219 * @param p_hwfn 220 * @param p_ptt 221 * @param port_id - the port to pretend to 222 */ 223 void ecore_port_pretend(struct ecore_hwfn *p_hwfn, 224 struct ecore_ptt *p_ptt, 225 u8 port_id); 226 227 /** 228 * @brief ecore_port_unpretend - cancel any previously set port 229 * pretend 230 * 231 * @param p_hwfn 232 * @param p_ptt 233 */ 234 void ecore_port_unpretend(struct ecore_hwfn *p_hwfn, 235 struct ecore_ptt *p_ptt); 236 237 /** 238 * @brief ecore_vfid_to_concrete - build a concrete FID for a 239 * given VF ID 240 * 241 * @param p_hwfn 242 * @param p_ptt 243 * @param vfid 244 */ 245 u32 ecore_vfid_to_concrete(struct ecore_hwfn *p_hwfn, u8 vfid); 246 247 /** 248 * @brief ecore_dmae_info_alloc - Init the dmae_info structure 249 * which is part of p_hwfn. 250 * @param p_hwfn 251 */ 252 enum _ecore_status_t ecore_dmae_info_alloc(struct ecore_hwfn *p_hwfn); 253 254 /** 255 * @brief ecore_dmae_info_free - Free the dmae_info structure 256 * which is part of p_hwfn 257 * 258 * @param p_hwfn 259 */ 260 void ecore_dmae_info_free(struct ecore_hwfn *p_hwfn); 261 262 enum _ecore_status_t ecore_init_fw_data(struct ecore_dev *p_dev, 263 const u8 *fw_data); 264 265 void ecore_hw_err_notify(struct ecore_hwfn *p_hwfn, 266 enum ecore_hw_err_type err_type); 267 268 enum _ecore_status_t ecore_dmae_sanity(struct ecore_hwfn *p_hwfn, 269 struct ecore_ptt *p_ptt, 270 const char *phase); 271 272 /** 273 * @brief ecore_ppfid_wr - Write value to BAR using the given ptt while 274 * pretending to a PF to which the given PPFID pertains. 275 * 276 * @param p_hwfn 277 * @param p_ptt 278 * @param abs_ppfid 279 * @param hw_addr 280 * @param val 281 */ 282 void ecore_ppfid_wr(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt, 283 u8 abs_ppfid, u32 hw_addr, u32 val); 284 285 /** 286 * @brief ecore_ppfid_rd - Read value from BAR using the given ptt while 287 * pretending to a PF to which the given PPFID pertains. 288 * 289 * @param p_hwfn 290 * @param p_ptt 291 * @param abs_ppfid 292 * @param hw_addr 293 */ 294 u32 ecore_ppfid_rd(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt, 295 u8 abs_ppfid, u32 hw_addr); 296 297 #endif /* __ECORE_HW_H__ */ 298