Searched refs:ZeroOp (Results 1 – 4 of 4) sorted by relevance
| /freebsd/contrib/llvm-project/clang/lib/CIR/Lowering/DirectToLLVM/ |
| H A D | LowerToLLVMIR.cpp | 43 if (auto cirOp = llvm::dyn_cast<mlir::LLVM::ZeroOp>(op)) in convertOperation()
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| H A D | LowerToLLVM.cpp | 315 return rewriter.create<mlir::LLVM::ZeroOp>( in visitCirAttr() 334 result = rewriter.create<mlir::LLVM::ZeroOp>( in visitCirAttr() 397 return rewriter.create<mlir::LLVM::ZeroOp>( in visitCirAttr() 730 mlir::Value zeroPtr = rewriter.create<mlir::LLVM::ZeroOp>( in matchAndRewrite() 839 rewriter.create<mlir::LLVM::ZeroOp>(loc, derivedAddr.getType())); in matchAndRewrite() 1028 rewriter.replaceOpWithNewOp<mlir::LLVM::ZeroOp>( in matchAndRewrite() 1421 zero = rewriter.create<mlir::LLVM::ZeroOp>(loc, llvmType); in matchAndRewrite() 2373 rewriter.create<mlir::LLVM::ZeroOp>( in matchAndRewrite()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | SVEInstrFormats.td | 10760 SDPatternOperator ZeroOp> { 10794 def : Pat<(nxv16i8 (ZeroOp (nxv16i1 PPR8:$Pn))), 10796 def : Pat<(nxv8i16 (ZeroOp (nxv8i1 PPR16:$Pn))), 10798 def : Pat<(nxv4i32 (ZeroOp (nxv4i1 PPR32:$Pn))), 10800 def : Pat<(nxv2i64 (ZeroOp (nxv2i1 PPR64:$Pn))),
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 24799 SDValue ZeroOp = DAG.getConstant(0, DL, NewScalarIntVT); in convertBuildVecZextToBuildVecWithZeros() local 24809 NewOps.append(*Factor, ZeroOp); in convertBuildVecZextToBuildVecWithZeros() 24815 NewOps.append(*Factor - 1, ZeroOp); in convertBuildVecZextToBuildVecWithZeros()
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