Searched refs:ZeroLHS (Results 1 – 2 of 2) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 3425 APInt UndefLHS, ZeroLHS; in SimplifyDemandedVectorElts() local
3427 if (SimplifyDemandedVectorElts(LHS, DemandedLHS, UndefLHS, ZeroLHS, TLO, in SimplifyDemandedVectorElts()
3435 KnownZero = ZeroLHS & ZeroRHS; in SimplifyDemandedVectorElts()
3467 APInt UndefLHS, ZeroLHS; in SimplifyDemandedVectorElts() local
3469 if (SimplifyDemandedVectorElts(LHS, DemandedLHS, UndefLHS, ZeroLHS, TLO, in SimplifyDemandedVectorElts()
3510 if (ZeroLHS[M]) in SimplifyDemandedVectorElts()
3575 APInt UndefLHS, ZeroLHS; in SimplifyDemandedVectorElts() local
3576 if (SimplifyDemandedVectorElts(Op0, DemandedElts, UndefLHS, ZeroLHS, TLO, in SimplifyDemandedVectorElts()
3601 APInt UndefLHS, ZeroLHS; in SimplifyDemandedVectorElts() local
3602 if (SimplifyDemandedVectorElts(Op0, DemandedElts, UndefLHS, ZeroLHS, TLO, in SimplifyDemandedVectorElts()
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 46133 bool ZeroLHS = ISD::isBuildVectorAllZeros(LHS.getNode()); in combineSelect() local
46136 if ((SelectableLHS && ZeroRHS) || (SelectableRHS && ZeroLHS)) { in combineSelect()
|