Searched refs:Zero64 (Results 1 – 7 of 7) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.cpp | 3885 Register Zero64; in buildMultiply() local
3893 if (!Zero64) in buildMultiply()
3894 Zero64 = B.buildConstant(S64, 0).getReg(0); in buildMultiply()
3895 return Zero64; in buildMultiply()
4570 auto Zero64 = B.buildConstant(S64, 0); in legalizeUnsignedDIV_REM64Impl() local
4571 auto NegDenom = B.buildSub(S64, Zero64, Denom); in legalizeUnsignedDIV_REM64Impl()
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| H A D | AMDGPURegisterBankInfo.cpp | 2599 Register Zero64 = B.buildConstant(S64, 0).getReg(0); in applyMappingImpl() local
2600 MRI.setRegClass(Zero64, &AMDGPU::VReg_64RegClass); in applyMappingImpl()
2603 B.buildInstr(NewOpc, {DstReg, CarryOut}, {Op0L, Op1L, Zero64}); in applyMappingImpl()
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| H A D | SIInstrInfo.cpp | 6523 Register Zero64 = MRI.createVirtualRegister(&AMDGPU::SReg_64RegClass); in extractRsrcPtr() local
6530 BuildMI(MBB, MI, MI.getDebugLoc(), TII.get(AMDGPU::S_MOV_B64), Zero64) in extractRsrcPtr()
6543 .addReg(Zero64) in extractRsrcPtr()
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| H A D | AMDGPUISelLowering.cpp | 2089 SDValue Zero64 = DAG.getConstant(0, DL, VT); in LowerUDIVREM64() local
2095 SDValue Neg_RHS = DAG.getNode(ISD::SUB, DL, VT, Zero64, RHS); in LowerUDIVREM64()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 8899 Register Zero64 = MRI.createVirtualRegister(&SystemZ::GR64BitRegClass); in emitExt128() local
8901 BuildMI(*MBB, MI, DL, TII->get(SystemZ::LLILL), Zero64) in emitExt128()
8904 .addReg(In128).addReg(Zero64).addImm(SystemZ::subreg_h64); in emitExt128()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 6901 auto Zero64 = MIRBuilder.buildConstant(S64, 0); in lowerU64ToF32BitOps() local
6908 auto NotZero = MIRBuilder.buildICmp(CmpInst::ICMP_NE, S1, Src, Zero64); in lowerU64ToF32BitOps()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 4814 SDValue Zero64 = DAG.getConstant(0, DL, MVT::i64); in LowerINT_TO_FP() local
4816 DAG.getSelectCC(DL, Highest, Zero64, SrcHi, SrcVal, ISD::SETNE); in LowerINT_TO_FP()
4830 Highest, Zero64, ISD::SETNE); in LowerINT_TO_FP()
4835 SrcLo, Zero64, ISD::SETNE); in LowerINT_TO_FP()
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