Searched refs:Zero32 (Results 1 – 8 of 8) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZTDC.cpp | 352 Value *Zero32 = ConstantInt::get(Type::getInt32Ty(Ctx), 0); in runOnFunction() local 369 Value *ICmp = IRB.CreateICmp(CmpInst::ICMP_NE, TDC, Zero32); in runOnFunction()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstructionSelector.cpp | |
| H A D | X86FastISel.cpp | 1967 Register Zero32 = createResultReg(&X86::GR32RegClass); in X86SelectDivRem() local 1969 TII.get(X86::MOV32r0), Zero32); in X86SelectDivRem() 1977 .addReg(Zero32, 0, X86::sub_16bit); in X86SelectDivRem() 1981 .addReg(Zero32); in X86SelectDivRem() 1985 .addImm(0).addReg(Zero32).addImm(X86::sub_32bit); in X86SelectDivRem()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/ |
| H A D | X86InstructionSelector.cpp | 1806 Register Zero32 = MRI.createVirtualRegister(&X86::GR32RegClass); in selectMulDivRem() local 1808 Zero32); in selectMulDivRem() 1816 .addReg(Zero32, 0, X86::sub_16bit); in selectMulDivRem() 1820 .addReg(Zero32); in selectMulDivRem() 1825 .addReg(Zero32) in selectMulDivRem()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Instrumentation/ |
| H A D | GCOVProfiling.cpp | 1131 Constant *Zero32 = Builder.getInt32(0); in insertCounterWriteout() local 1133 Constant *TwoZero32s[] = {Zero32, Zero32}; in insertCounterWriteout()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.cpp | 2586 const auto Zero32 = B.buildConstant(S32, 0); in legalizeIntrinsicTrunc() local 2589 auto SignBit64 = B.buildMergeLikeInstr(S64, {Zero32, SignBit}); in legalizeIntrinsicTrunc() 2596 auto ExpLt0 = B.buildICmp(CmpInst::ICMP_SLT, S1, Exp, Zero32); in legalizeIntrinsicTrunc() 3942 Register Zero32; in buildMultiply() local 3946 if (!Zero32) in buildMultiply() 3947 Zero32 = B.buildConstant(S32, 0).getReg(0); in buildMultiply() 3948 return Zero32; in buildMultiply() 4648 auto Zero32 = B.buildConstant(S32, 0); in legalizeUnsignedDIV_REM64Impl() local 4687 auto Sub2_Hi = B.buildUSube(S32, S1, Sub2_Mi, Zero32, Sub2_Lo.getReg(1)); in legalizeUnsignedDIV_REM64Impl() 4705 auto Sub3_Hi = B.buildUSube(S32, S1, Sub3_Mi, Zero32, Sub3_Lo.getReg(1)); in legalizeUnsignedDIV_REM64Impl() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 7589 auto Zero32 = MIRBuilder.buildConstant(S32, 0); in lowerU64ToF32BitOps() local 7598 auto E = MIRBuilder.buildSelect(S32, NotZero, Sub, Zero32); in lowerU64ToF32BitOps() 7618 auto Select0 = MIRBuilder.buildSelect(S32, TCmp, VTrunc1, Zero32); in lowerU64ToF32BitOps()
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| /freebsd/contrib/llvm-project/llvm/lib/Frontend/OpenMP/ |
| H A D | OMPIRBuilder.cpp | 4908 Constant *Zero32 = ConstantInt::get(I32Type, 0); in applyDynamicWorkshareLoop() local 4909 Value *MoreWork = Builder.CreateCmp(CmpInst::ICMP_NE, Res, Zero32); in applyDynamicWorkshareLoop()
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