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/freebsd/contrib/llvm-project/llvm/include/llvm/Support/
H A DKnownBits.h25 APInt Zero; member
30 KnownBits(APInt Zero, APInt One) in KnownBits()
31 : Zero(std::move(Zero)), One(std::move(One)) {} in KnownBits()
41 KnownBits(unsigned BitWidth) : Zero(BitWidth, 0), One(BitWidth, 0) {} in KnownBits()
45 assert(Zero.getBitWidth() == One.getBitWidth() && in getBitWidth()
47 return Zero.getBitWidth(); in getBitWidth()
51 bool hasConflict() const { return Zero.intersects(One); } in hasConflict()
55 return Zero.popcount() + One.popcount() == getBitWidth(); in isConstant()
66 bool isUnknown() const { return Zero.isZero() && One.isZero(); } in isUnknown()
70 return !Zero.isSignBitSet() && !One.isSignBitSet(); in isSignUnknown()
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/freebsd/contrib/llvm-project/llvm/lib/Support/
H A DKnownBits.cpp23 APInt Zero = Val.Zero; in flipSignBit() local
25 Zero.setBitVal(SignBitPosition, Val.One[SignBitPosition]); in flipSignBit()
26 One.setBitVal(SignBitPosition, Val.Zero[SignBitPosition]); in flipSignBit()
27 return KnownBits(Zero, One); in flipSignBit()
37 APInt CarryKnownZero = ~(PossibleSumZero ^ LHS.Zero ^ RHS.Zero); in computeForAddCarry()
41 APInt LHSKnownUnion = LHS.Zero | LHS.One; in computeForAddCarry()
42 APInt RHSKnownUnion = RHS.Zero | RHS.One; in computeForAddCarry()
48 KnownOut.Zero = ~std::move(PossibleSumZero) & Known; in computeForAddCarry()
57 LHS, RHS, Carry.Zero.getBoolValue(), Carry.One.getBoolValue()); in computeForAddCarry()
78 std::swap(NotRHS.Zero, NotRHS.One); in computeForAddSub()
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/freebsd/contrib/llvm-project/clang/lib/StaticAnalyzer/Core/
H A DRangedConstraintManager.cpp45 const llvm::APSInt &Zero = getBasicVals().getValue(0, SIE->getType()); in assumeSym() local
46 return assumeSymRel(State, SIE, (Assumption ? BO_NE : BO_EQ), Zero); in assumeSym()
68 const llvm::APSInt &Zero = getBasicVals().getValue(0, DiffTy); in assumeSym() local
72 return assumeSymRel(State, Subtraction, Op, Zero); in assumeSym()
85 const llvm::APSInt &Zero = getBasicVals().getValue(0, ExprType); in assumeSym() local
88 return assumeSymNE(State, CanonicalEquality, Zero, Zero); in assumeSym()
91 return assumeSymEQ(State, CanonicalEquality, Zero, Zero); in assumeSym()
145 const llvm::APSInt &Zero = BVF.getValue(0, T); in assumeSymUnsupported() local
147 return assumeSymNE(State, Sym, Zero, Zero); in assumeSymUnsupported()
149 return assumeSymEQ(State, Sym, Zero, Zero); in assumeSymUnsupported()
/freebsd/contrib/llvm-project/llvm/lib/Analysis/
H A DScalarEvolutionDivision.cpp66 *Remainder = D.Zero; in divide()
71 *Quotient = D.Zero; in divide()
72 *Remainder = D.Zero; in divide()
79 *Remainder = D.Zero; in divide()
94 *Quotient = D.Zero; in divide()
99 *Remainder = D.Zero; in divide()
208 Remainder = Zero; in visitMulExpr()
221 RewriteMap[cast<SCEVUnknown>(Denominator)->getValue()] = Zero; in visitMulExpr()
238 if (R != Zero) in visitMulExpr()
246 Zero = SE.getZero(Denominator->getType()); in SCEVDivision()
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H A DDemandedBits.cpp232 AB &= ~Known2.Zero; in determineLiveOperandBits()
234 AB &= ~(Known.Zero & ~Known2.Zero); in determineLiveOperandBits()
505 APInt Bound = (LHS.Zero & RHS.Zero) | (LHS.One & RHS.One); in determineLiveOperandBitsAddCarry()
522 NeededToMaintainCarryZero = LHS.Zero | ~RHS.Zero; in determineLiveOperandBitsAddCarry()
525 NeededToMaintainCarryZero = RHS.Zero | ~LHS.Zero; in determineLiveOperandBitsAddCarry()
530 APInt PossibleSumZero = ~LHS.Zero + ~RHS.Zero + !CarryZero; in determineLiveOperandBitsAddCarry()
564 NRHS.Zero = RHS.One; in determineLiveOperandBitsSub()
565 NRHS.One = RHS.Zero; in determineLiveOperandBitsSub()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineSimplifyDemanded.cpp218 SimplifyDemandedBits(I, 0, DemandedMask & ~RHSKnown.Zero, LHSKnown, Q, in SimplifyDemandedUseBits()
227 if (DemandedMask.isSubsetOf(Known.Zero | Known.One)) in SimplifyDemandedUseBits()
232 if (DemandedMask.isSubsetOf(LHSKnown.Zero | RHSKnown.One)) in SimplifyDemandedUseBits()
234 if (DemandedMask.isSubsetOf(RHSKnown.Zero | LHSKnown.One)) in SimplifyDemandedUseBits()
238 if (ShrinkDemandedConstant(I, 1, DemandedMask & ~LHSKnown.Zero)) in SimplifyDemandedUseBits()
258 if (DemandedMask.isSubsetOf(Known.Zero | Known.One)) in SimplifyDemandedUseBits()
263 if (DemandedMask.isSubsetOf(LHSKnown.One | RHSKnown.Zero)) in SimplifyDemandedUseBits()
265 if (DemandedMask.isSubsetOf(RHSKnown.One | LHSKnown.Zero)) in SimplifyDemandedUseBits()
304 if (DemandedMask.isSubsetOf(Known.Zero | Known.One)) in SimplifyDemandedUseBits()
309 if (DemandedMask.isSubsetOf(RHSKnown.Zero)) in SimplifyDemandedUseBits()
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/freebsd/lib/msun/src/
H A De_fmodf.c25 static const float one = 1.0, Zero[] = {0.0, -0.0,}; variable
44 return Zero[(u_int32_t)sx>>31]; /* |x|=|y| return x*0*/ in fmodf()
79 return Zero[(u_int32_t)sx>>31]; in fmodf()
88 return Zero[(u_int32_t)sx>>31]; in fmodf()
H A De_fmod.c24 static const double one = 1.0, Zero[] = {0.0, -0.0,}; variable
45 return Zero[(u_int32_t)sx>>31]; /* |x|=|y| return x*0*/ in fmod()
93 return Zero[(u_int32_t)sx>>31]; in fmod()
102 return Zero[(u_int32_t)sx>>31]; in fmod()
H A De_fmodl.c48 static const long double one = 1.0, Zero[] = {0.0, -0.0,}; variable
87 return Zero[sx]; /* |x|=|y| return x*0*/ in fmodl()
121 return Zero[sx]; in fmodl()
130 return Zero[sx]; in fmodl()
H A Ds_remquof.c15 static const float Zero[] = {0.0, -0.0,}; variable
46 return Zero[(u_int32_t)sx>>31]; /* |x|=|y| return x*0*/ in remquof()
91 return Zero[(u_int32_t)sx>>31]; in remquof()
H A Ds_remquo.c17 static const double Zero[] = {0.0, -0.0,}; variable
51 return Zero[(u_int32_t)sx>>31]; /* |x|=|y| return x*0*/ in remquo()
109 return Zero[(u_int32_t)sx>>31]; in remquo()
/freebsd/cddl/contrib/opensolaris/cmd/dtrace/test/tst/common/aggs/
H A Dtst.lquantzero.d.out1 Zero below the range:
124 Zero just below the range:
247 Zero at the bottom of the range:
394 Zero within the range:
541 Zero at the top of the range:
664 Zero just above the range:
787 Zero above the range:
/freebsd/sys/contrib/device-tree/Bindings/mtd/
H A Dfsmc-nand.txt16 are valid. Zero means one clockcycle, 15 means 16 clock
21 Only valid for write transactions. Zero means zero cycles,
24 when writing) after the command deassertation. Zero means
27 NAND flash in response to SMWAITn. Zero means 1 cycle,
30 command is asserted. Zero means one cycle, 255 means 256
/freebsd/contrib/llvm-project/clang/include/clang/Basic/
H A DThunk.h59 VirtualAdjustment Zero; in isEmpty() local
60 return Equals(Zero); in isEmpty()
126 VirtualAdjustment Zero; in isEmpty() local
127 return Equals(Zero); in isEmpty()
/freebsd/contrib/llvm-project/llvm/lib/Target/DirectX/
H A DDXILIntrinsicExpansion.cpp110 Value *Zero = ConstantInt::get(Ty, 0); in expandUsubSat() local
111 return Builder.CreateSelect(Cmp, Zero, Sub, "usub.sat"); in expandUsubSat()
151 Constant *Zero = Ty->isVectorTy() in expandAbs() local
157 auto *V = Builder.CreateSub(Zero, X); in expandAbs()
479 Constant *Zero = ConstantFP::get(Ty, 0); in expandAtan2Intrinsic() local
485 Value *XLt0 = Builder.CreateFCmpOLT(X, Zero); in expandAtan2Intrinsic()
486 Value *XEq0 = Builder.CreateFCmpOEQ(X, Zero); in expandAtan2Intrinsic()
487 Value *YGe0 = Builder.CreateFCmpOGE(Y, Zero); in expandAtan2Intrinsic()
488 Value *YLt0 = Builder.CreateFCmpOLT(Y, Zero); in expandAtan2Intrinsic()
537 Constant *Zero = ConstantFP::get(Ty->getScalarType(), 0.0); in expandStepIntrinsic() local
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/Utils/
H A DAMDGPUEmitPrintf.cpp80 auto Zero = Builder.getInt64(0); in appendArg() local
81 return callAppendArgs(Builder, Desc, 1, Arg0, Zero, Zero, Zero, Zero, Zero, in appendArg()
82 Zero, IsLast); in appendArg()
93 auto Zero = Builder.getInt64(0); in getStrlenWithNull() local
149 LenPhi->addIncoming(Zero, Prev); in getStrlenWithNull()
H A DLowerAtomic.cpp99 Constant *Zero = ConstantInt::get(Loaded->getType(), 0); in buildAtomicRMWValue() local
100 return Builder.CreateSelect(Cmp, Zero, Inc, "new"); in buildAtomicRMWValue()
103 Constant *Zero = ConstantInt::get(Loaded->getType(), 0); in buildAtomicRMWValue() local
107 Value *CmpEq0 = Builder.CreateICmpEQ(Loaded, Zero); in buildAtomicRMWValue()
H A DLowerMemIntrinsics.cpp289 ConstantInt *Zero = ConstantInt::get(ILengthType, 0U); in createMemCpyLoopUnknownSize() local
290 PLBuilder.CreateCondBr(PLBuilder.CreateICmpNE(RuntimeLoopBytes, Zero), in createMemCpyLoopUnknownSize()
300 RHBuilder.CreateCondBr(RHBuilder.CreateICmpNE(RuntimeResidualBytes, Zero), in createMemCpyLoopUnknownSize()
307 ResidualIndex->addIncoming(Zero, ResHeaderBB); in createMemCpyLoopUnknownSize()
342 ConstantInt *Zero = ConstantInt::get(ILengthType, 0U); in createMemCpyLoopUnknownSize() local
343 PLBuilder.CreateCondBr(PLBuilder.CreateICmpNE(RuntimeLoopBytes, Zero), in createMemCpyLoopUnknownSize()
434 ConstantInt *Zero = ConstantInt::get(ILengthType, 0); in createMemMoveLoopUnknownSize() local
447 PLBuilder.CreateICmpEQ(RuntimeLoopRemainder, Zero, "skip_residual"); in createMemMoveLoopUnknownSize()
450 PLBuilder.CreateICmpEQ(RuntimeLoopBytes, Zero, "skip_main"); in createMemMoveLoopUnknownSize()
573 MainLoopBuilder.CreateCondBr(MainLoopBuilder.CreateICmpEQ(MainIndex, Zero), in createMemMoveLoopUnknownSize()
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H A DIntegerDivision.cpp151 ConstantInt *Zero = ConstantInt::get(DivTy, 0); in generateUnsignedDivisionCode() local
231 Value *Ret0_1 = Builder.CreateICmpEQ(Divisor, Zero); in generateUnsignedDivisionCode()
232 Value *Ret0_2 = Builder.CreateICmpEQ(Dividend, Zero); in generateUnsignedDivisionCode()
240 Value *RetVal = Builder.CreateSelect(Ret0, Zero, Dividend); in generateUnsignedDivisionCode()
254 Value *SkipLoop = Builder.CreateICmpEQ(SR_1, Zero); in generateUnsignedDivisionCode()
300 Value *Tmp12 = Builder.CreateICmpEQ(SR_2, Zero); in generateUnsignedDivisionCode()
324 Carry_1->addIncoming(Zero, Preheader); in generateUnsignedDivisionCode()
336 Carry_2->addIncoming(Zero, BB1); in generateUnsignedDivisionCode()
/freebsd/contrib/llvm-project/llvm/include/llvm/IR/
H A DFixedPointBuilder.h55 Value *Zero = Constant::getNullValue(Result->getType()); in Convert() local
56 Value *IsNegative = B.CreateICmpSLT(Result, Zero); in Convert()
215 Constant *Zero = Constant::getNullValue(Result->getType()); in CreateFloatingToFixed() local
217 B.CreateSelect(B.CreateICmpSLT(Result, Zero), Zero, Result, "satmin"); in CreateFloatingToFixed()
273 Constant *Zero = Constant::getNullValue(Result->getType()); in CreateSub() local
275 B.CreateSelect(B.CreateICmpSLT(Result, Zero), Zero, Result, "satmin"); in CreateSub()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64InstrInfo.h769 static inline unsigned getAUTOpcodeForKey(AArch64PACKey::ID K, bool Zero) { in getAUTOpcodeForKey() argument
772 case IA: return Zero ? AArch64::AUTIZA : AArch64::AUTIA; in getAUTOpcodeForKey()
773 case IB: return Zero ? AArch64::AUTIZB : AArch64::AUTIB; in getAUTOpcodeForKey()
774 case DA: return Zero ? AArch64::AUTDZA : AArch64::AUTDA; in getAUTOpcodeForKey()
775 case DB: return Zero ? AArch64::AUTDZB : AArch64::AUTDB; in getAUTOpcodeForKey()
782 static inline unsigned getPACOpcodeForKey(AArch64PACKey::ID K, bool Zero) { in getPACOpcodeForKey() argument
785 case IA: return Zero ? AArch64::PACIZA : AArch64::PACIA; in getPACOpcodeForKey()
786 case IB: return Zero ? AArch64::PACIZB : AArch64::PACIB; in getPACOpcodeForKey()
787 case DA: return Zero ? AArch64::PACDZA : AArch64::PACDA; in getPACOpcodeForKey()
788 case DB: return Zero ? AArch64::PACDZB : AArch64::PACDB; in getPACOpcodeForKey()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86PartialReduction.cpp204 Value *Zero = Constant::getNullValue(MAdd->getType()); in tryMAddReplacement() local
205 Value *Concat = Builder.CreateShuffleVector(MAdd, Zero, ConcatMask); in tryMAddReplacement()
288 Value *Zero = Constant::getNullValue(Op0->getType()); in trySADReplacement() local
289 Op0 = Builder.CreateShuffleVector(Op0, Zero, ConcatMask); in trySADReplacement()
290 Op1 = Builder.CreateShuffleVector(Op1, Zero, ConcatMask); in trySADReplacement()
339 Value *Zero = Constant::getNullValue(Ops[0]->getType()); in trySADReplacement() local
340 Ops[0] = Builder.CreateShuffleVector(Ops[0], Zero, ConcatMask); in trySADReplacement()
/freebsd/contrib/xz/
H A DCOPYING8 - liblzma is under the BSD Zero Clause License (0BSD).
32 the BSD Zero Clause License (0BSD).
49 For the files under the BSD Zero Clause License (0BSD), if
63 - COPYING.0BSD: BSD Zero Clause License
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonBitTracker.cpp317 return rr0(RegisterCell(W0).fill(0, W0, BT::BitValue::Zero), Outputs); in evaluate()
326 RC.fill(0, L, BT::BitValue::Zero); in evaluate()
342 RC.fill(PW, RW, BT::BitValue::Zero); in evaluate()
349 RC.fill(PW, RW, BT::BitValue::Zero); in evaluate()
431 RPC.fill(0, 2, BT::BitValue::Zero); in evaluate()
677 RC[im(2)] = BT::BitValue::Zero; in evaluate()
689 : RC[BX].is(1) ? BT::BitValue::Zero in evaluate()
698 const BT::BitValue Zero = BT::BitValue::Zero; in evaluate() local
699 RegisterCell RZ = RegisterCell(W0).fill(BX, W1, Zero) in evaluate()
700 .fill(W1+(W1-BX), W0, Zero); in evaluate()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp1765 const SDValue Zero = DAG.getConstant(0, SL, MVT::i32); in split64BitValue() local
1768 SDValue Lo = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, Vec, Zero); in split64BitValue()
1778 const SDValue Zero = DAG.getConstant(0, SL, MVT::i32); in getLoHalf64() local
1779 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, Vec, Zero); in getLoHalf64()
2088 SDValue Zero = DAG.getConstant(0, DL, HalfVT); in LowerUDIVREM64() local
2105 SDValue DIV = DAG.getBuildVector(MVT::v2i32, DL, {Res.getValue(0), Zero}); in LowerUDIVREM64()
2106 SDValue REM = DAG.getBuildVector(MVT::v2i32, DL, {Res.getValue(1), Zero}); in LowerUDIVREM64()
2193 SDValue C1 = DAG.getSelectCC(DL, Sub1_Hi, RHS_Hi, MinusOne, Zero, in LowerUDIVREM64()
2195 SDValue C2 = DAG.getSelectCC(DL, Sub1_Lo, RHS_Lo, MinusOne, Zero, in LowerUDIVREM64()
2209 Zero, Sub2_Lo.getValue(1)); in LowerUDIVREM64()
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