Home
last modified time | relevance | path

Searched refs:Zero (Results 1 – 25 of 354) sorted by relevance

12345678910>>...15

/freebsd/contrib/llvm-project/llvm/include/llvm/Support/
H A DKnownBits.h24 APInt Zero; member
29 KnownBits(APInt Zero, APInt One) in KnownBits()
30 : Zero(std::move(Zero)), One(std::move(One)) {} in KnownBits()
37 KnownBits(unsigned BitWidth) : Zero(BitWidth, 0), One(BitWidth, 0) {} in KnownBits()
41 assert(Zero.getBitWidth() == One.getBitWidth() && in getBitWidth()
43 return Zero.getBitWidth(); in getBitWidth()
47 bool hasConflict() const { return Zero.intersects(One); } in hasConflict()
51 return Zero.popcount() + One.popcount() == getBitWidth(); in isConstant()
62 bool isUnknown() const { return Zero.isZero() && One.isZero(); } in isUnknown()
66 return !Zero.isSignBitSet() && !One.isSignBitSet(); in isSignUnknown()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Support/
H A DKnownBits.cpp28 APInt CarryKnownZero = ~(PossibleSumZero ^ LHS.Zero ^ RHS.Zero); in computeForAddCarry()
32 APInt LHSKnownUnion = LHS.Zero | LHS.One; in computeForAddCarry()
33 APInt RHSKnownUnion = RHS.Zero | RHS.One; in computeForAddCarry()
39 KnownOut.Zero = ~std::move(PossibleSumZero) & Known; in computeForAddCarry()
48 LHS, RHS, Carry.Zero.getBoolValue(), Carry.One.getBoolValue()); in computeForAddCarry()
69 std::swap(NotRHS.Zero, NotRHS.One); in computeForAddSub()
98 KnownOut.Zero.setBits(BitWidth - 1 - NumBits, BitWidth - 1); in computeForAddSub()
100 KnownOut.Zero.setHighBits(MaxVal.countl_zero()); in computeForAddSub()
121 KnownOut.Zero.setSignBit(); in computeForAddSub()
126 KnownOut.Zero.setBits(BitWidth - 1 - NumBits, BitWidth - 1); in computeForAddSub()
[all …]
/freebsd/contrib/llvm-project/clang/lib/StaticAnalyzer/Core/
H A DRangedConstraintManager.cpp45 const llvm::APSInt &Zero = getBasicVals().getValue(0, SIE->getType()); in assumeSym() local
46 return assumeSymRel(State, SIE, (Assumption ? BO_NE : BO_EQ), Zero); in assumeSym()
68 const llvm::APSInt &Zero = getBasicVals().getValue(0, DiffTy); in assumeSym() local
72 return assumeSymRel(State, Subtraction, Op, Zero); in assumeSym()
85 const llvm::APSInt &Zero = getBasicVals().getValue(0, ExprType); in assumeSym() local
88 return assumeSymNE(State, CanonicalEquality, Zero, Zero); in assumeSym()
91 return assumeSymEQ(State, CanonicalEquality, Zero, Zero); in assumeSym()
145 const llvm::APSInt &Zero = BVF.getValue(0, T); in assumeSymUnsupported() local
147 return assumeSymNE(State, Sym, Zero, Zero); in assumeSymUnsupported()
149 return assumeSymEQ(State, Sym, Zero, Zero); in assumeSymUnsupported()
/freebsd/contrib/llvm-project/llvm/lib/Analysis/
H A DScalarEvolutionDivision.cpp66 *Remainder = D.Zero; in divide()
71 *Quotient = D.Zero; in divide()
72 *Remainder = D.Zero; in divide()
79 *Remainder = D.Zero; in divide()
94 *Quotient = D.Zero; in divide()
99 *Remainder = D.Zero; in divide()
208 Remainder = Zero; in visitMulExpr()
221 RewriteMap[cast<SCEVUnknown>(Denominator)->getValue()] = Zero; in visitMulExpr()
238 if (R != Zero) in visitMulExpr()
246 Zero = SE.getZero(Denominator->getType()); in SCEVDivision()
[all …]
H A DDemandedBits.cpp234 AB &= ~Known2.Zero; in determineLiveOperandBits()
236 AB &= ~(Known.Zero & ~Known2.Zero); in determineLiveOperandBits()
507 APInt Bound = (LHS.Zero & RHS.Zero) | (LHS.One & RHS.One); in determineLiveOperandBitsAddCarry()
524 NeededToMaintainCarryZero = LHS.Zero | ~RHS.Zero; in determineLiveOperandBitsAddCarry()
527 NeededToMaintainCarryZero = RHS.Zero | ~LHS.Zero; in determineLiveOperandBitsAddCarry()
532 APInt PossibleSumZero = ~LHS.Zero + ~RHS.Zero + !CarryZero; in determineLiveOperandBitsAddCarry()
566 NRHS.Zero = RHS.One; in determineLiveOperandBitsSub()
567 NRHS.One = RHS.Zero; in determineLiveOperandBitsSub()
H A DMemoryBuiltins.cpp721 Zero = APInt::getZero(IntTyBits); in computeImpl()
786 return SizeOffsetAPInt(align(Size, I.getAlign()), Zero); in visitAllocaInst()
797 : SizeOffsetAPInt(align(Size, I.getAlign()), Zero); in visitAllocaInst()
811 return SizeOffsetAPInt(align(Size, A.getParamAlign()), Zero); in visitArgument()
816 return SizeOffsetAPInt(*Size, Zero); in visitCallBase()
831 return SizeOffsetAPInt(Zero, Zero); in visitConstantPointerNull()
859 return SizeOffsetAPInt(align(Size, GV.getAlign()), Zero); in visitGlobalVariable()
1031 return SizeOffsetAPInt(Zero, Zero); in visitUndefValue()
1059 Zero = ConstantInt::get(IntTy, 0); in compute()
1149 assert(ArraySize->getType() == Zero->getType() && in visitAllocaInst()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineSimplifyDemanded.cpp211 SimplifyDemandedBits(I, 0, DemandedMask & ~RHSKnown.Zero, LHSKnown, in SimplifyDemandedUseBits()
220 if (DemandedMask.isSubsetOf(Known.Zero | Known.One)) in SimplifyDemandedUseBits()
225 if (DemandedMask.isSubsetOf(LHSKnown.Zero | RHSKnown.One)) in SimplifyDemandedUseBits()
227 if (DemandedMask.isSubsetOf(RHSKnown.Zero | LHSKnown.One)) in SimplifyDemandedUseBits()
231 if (ShrinkDemandedConstant(I, 1, DemandedMask & ~LHSKnown.Zero)) in SimplifyDemandedUseBits()
251 if (DemandedMask.isSubsetOf(Known.Zero | Known.One)) in SimplifyDemandedUseBits()
256 if (DemandedMask.isSubsetOf(LHSKnown.One | RHSKnown.Zero)) in SimplifyDemandedUseBits()
258 if (DemandedMask.isSubsetOf(RHSKnown.One | LHSKnown.Zero)) in SimplifyDemandedUseBits()
297 if (DemandedMask.isSubsetOf(Known.Zero | Known.One)) in SimplifyDemandedUseBits()
302 if (DemandedMask.isSubsetOf(RHSKnown.Zero)) in SimplifyDemandedUseBits()
[all …]
/freebsd/lib/msun/src/
H A De_fmodf.c25 static const float one = 1.0, Zero[] = {0.0, -0.0,}; variable
44 return Zero[(u_int32_t)sx>>31]; /* |x|=|y| return x*0*/ in fmodf()
77 return Zero[(u_int32_t)sx>>31]; in fmodf()
86 return Zero[(u_int32_t)sx>>31]; in fmodf()
H A De_fmod.c24 static const double one = 1.0, Zero[] = {0.0, -0.0,}; variable
45 return Zero[(u_int32_t)sx>>31]; /* |x|=|y| return x*0*/ in fmod()
99 return Zero[(u_int32_t)sx>>31]; in fmod()
108 return Zero[(u_int32_t)sx>>31]; in fmod()
H A De_fmodl.c48 static const long double one = 1.0, Zero[] = {0.0, -0.0,}; variable
87 return Zero[sx]; /* |x|=|y| return x*0*/ in fmodl()
121 return Zero[sx]; in fmodl()
130 return Zero[sx]; in fmodl()
H A Ds_remquof.c15 static const float Zero[] = {0.0, -0.0,}; variable
46 return Zero[(u_int32_t)sx>>31]; /* |x|=|y| return x*0*/ in remquof()
89 return Zero[(u_int32_t)sx>>31]; in remquof()
H A Ds_remquo.c17 static const double Zero[] = {0.0, -0.0,}; variable
51 return Zero[(u_int32_t)sx>>31]; /* |x|=|y| return x*0*/ in remquo()
115 return Zero[(u_int32_t)sx>>31]; in remquo()
H A Ds_remquol.c48 static const long double Zero[] = {0.0L, -0.0L}; variable
95 return Zero[sx]; /* |x|=|y| return x*0*/ in remquol()
137 return Zero[sx]; in remquol()
/freebsd/cddl/contrib/opensolaris/cmd/dtrace/test/tst/common/aggs/
H A Dtst.lquantzero.d.out1 Zero below the range:
124 Zero just below the range:
247 Zero at the bottom of the range:
394 Zero within the range:
541 Zero at the top of the range:
664 Zero just above the range:
787 Zero above the range:
/freebsd/sys/contrib/device-tree/Bindings/mtd/
H A Dfsmc-nand.txt16 are valid. Zero means one clockcycle, 15 means 16 clock
21 Only valid for write transactions. Zero means zero cycles,
24 when writing) after the command deassertation. Zero means
27 NAND flash in response to SMWAITn. Zero means 1 cycle,
30 command is asserted. Zero means one cycle, 255 means 256
/freebsd/contrib/llvm-project/clang/include/clang/Basic/
H A DThunk.h59 VirtualAdjustment Zero; in isEmpty() local
60 return Equals(Zero); in isEmpty()
126 VirtualAdjustment Zero; in isEmpty() local
127 return Equals(Zero); in isEmpty()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DGISelKnownBits.cpp95 return getKnownBits(R).Zero; in getKnownZeroes()
104 << toString(Known.Zero | Known.One, 16, false) << "\n" in dumpResult()
105 << "[" << Depth << "] Zero: 0x" << toString(Known.Zero, 16, false) in dumpResult()
137 Mask.Zero = APInt::getBitsSetFrom( in extractBits()
194 Known.Zero.setAllBits(); Known.One.setAllBits(); in computeKnownBitsImpl()
215 Known.Zero = APInt::getAllOnes(BitWidth); in computeKnownBitsImpl()
384 Known.Zero.setBitsFrom(1); in computeKnownBitsImpl()
482 Known.Zero.setBitsFrom(SrcBitWidth); in computeKnownBitsImpl()
491 Known.Zero.setLowBits(LogOfAlign); in computeKnownBitsImpl()
546 Known.Zero.setBitsFrom(LowBits); in computeKnownBitsImpl()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Utils/
H A DLowerAtomic.cpp84 Constant *Zero = ConstantInt::get(Loaded->getType(), 0); in buildAtomicRMWValue() local
85 return Builder.CreateSelect(Cmp, Zero, Inc, "new"); in buildAtomicRMWValue()
88 Constant *Zero = ConstantInt::get(Loaded->getType(), 0); in buildAtomicRMWValue() local
92 Value *CmpEq0 = Builder.CreateICmpEQ(Loaded, Zero); in buildAtomicRMWValue()
H A DAMDGPUEmitPrintf.cpp80 auto Zero = Builder.getInt64(0); in appendArg() local
81 return callAppendArgs(Builder, Desc, 1, Arg0, Zero, Zero, Zero, Zero, Zero, in appendArg()
82 Zero, IsLast); in appendArg()
93 auto Zero = Builder.getInt64(0); in getStrlenWithNull() local
149 LenPhi->addIncoming(Zero, Prev); in getStrlenWithNull()
H A DIntegerDivision.cpp151 ConstantInt *Zero = ConstantInt::get(DivTy, 0); in generateUnsignedDivisionCode() local
231 Value *Ret0_1 = Builder.CreateICmpEQ(Divisor, Zero); in generateUnsignedDivisionCode()
232 Value *Ret0_2 = Builder.CreateICmpEQ(Dividend, Zero); in generateUnsignedDivisionCode()
240 Value *RetVal = Builder.CreateSelect(Ret0, Zero, Dividend); in generateUnsignedDivisionCode()
254 Value *SkipLoop = Builder.CreateICmpEQ(SR_1, Zero); in generateUnsignedDivisionCode()
300 Value *Tmp12 = Builder.CreateICmpEQ(SR_2, Zero); in generateUnsignedDivisionCode()
324 Carry_1->addIncoming(Zero, Preheader); in generateUnsignedDivisionCode()
336 Carry_2->addIncoming(Zero, BB1); in generateUnsignedDivisionCode()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64InstrInfo.h726 static inline unsigned getAUTOpcodeForKey(AArch64PACKey::ID K, bool Zero) { in getAUTOpcodeForKey() argument
729 case IA: return Zero ? AArch64::AUTIZA : AArch64::AUTIA; in getAUTOpcodeForKey()
730 case IB: return Zero ? AArch64::AUTIZB : AArch64::AUTIB; in getAUTOpcodeForKey()
731 case DA: return Zero ? AArch64::AUTDZA : AArch64::AUTDA; in getAUTOpcodeForKey()
732 case DB: return Zero ? AArch64::AUTDZB : AArch64::AUTDB; in getAUTOpcodeForKey()
739 static inline unsigned getPACOpcodeForKey(AArch64PACKey::ID K, bool Zero) { in getPACOpcodeForKey() argument
742 case IA: return Zero ? AArch64::PACIZA : AArch64::PACIA; in getPACOpcodeForKey()
743 case IB: return Zero ? AArch64::PACIZB : AArch64::PACIB; in getPACOpcodeForKey()
744 case DA: return Zero ? AArch64::PACDZA : AArch64::PACDA; in getPACOpcodeForKey()
745 case DB: return Zero ? AArch64::PACDZB : AArch64::PACDB; in getPACOpcodeForKey()
/freebsd/contrib/llvm-project/llvm/include/llvm/IR/
H A DFixedPointBuilder.h55 Value *Zero = Constant::getNullValue(Result->getType()); in Convert() local
56 Value *IsNegative = B.CreateICmpSLT(Result, Zero); in Convert()
215 Constant *Zero = Constant::getNullValue(Result->getType()); in CreateFloatingToFixed() local
217 B.CreateSelect(B.CreateICmpSLT(Result, Zero), Zero, Result, "satmin"); in CreateFloatingToFixed()
273 Constant *Zero = Constant::getNullValue(Result->getType()); in CreateSub() local
275 B.CreateSelect(B.CreateICmpSLT(Result, Zero), Zero, Result, "satmin"); in CreateSub()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86PartialReduction.cpp207 Value *Zero = Constant::getNullValue(MAdd->getType()); in tryMAddReplacement() local
208 Value *Concat = Builder.CreateShuffleVector(MAdd, Zero, ConcatMask); in tryMAddReplacement()
291 Value *Zero = Constant::getNullValue(Op0->getType()); in trySADReplacement() local
292 Op0 = Builder.CreateShuffleVector(Op0, Zero, ConcatMask); in trySADReplacement()
293 Op1 = Builder.CreateShuffleVector(Op1, Zero, ConcatMask); in trySADReplacement()
342 Value *Zero = Constant::getNullValue(Ops[0]->getType()); in trySADReplacement() local
343 Ops[0] = Builder.CreateShuffleVector(Ops[0], Zero, ConcatMask); in trySADReplacement()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonBitTracker.cpp325 return rr0(RegisterCell(W0).fill(0, W0, BT::BitValue::Zero), Outputs); in evaluate()
334 RC.fill(0, L, BT::BitValue::Zero); in evaluate()
350 RC.fill(PW, RW, BT::BitValue::Zero); in evaluate()
357 RC.fill(PW, RW, BT::BitValue::Zero); in evaluate()
439 RPC.fill(0, 2, BT::BitValue::Zero); in evaluate()
685 RC[im(2)] = BT::BitValue::Zero; in evaluate()
697 : RC[BX].is(1) ? BT::BitValue::Zero in evaluate()
706 const BT::BitValue Zero = BT::BitValue::Zero; in evaluate() local
707 RegisterCell RZ = RegisterCell(W0).fill(BX, W1, Zero) in evaluate()
708 .fill(W1+(W1-BX), W0, Zero); in evaluate()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp1708 const SDValue Zero = DAG.getConstant(0, SL, MVT::i32); in split64BitValue() local
1711 SDValue Lo = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, Vec, Zero); in split64BitValue()
1721 const SDValue Zero = DAG.getConstant(0, SL, MVT::i32); in getLoHalf64() local
1722 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, Vec, Zero); in getLoHalf64()
2031 SDValue Zero = DAG.getConstant(0, DL, HalfVT); in LowerUDIVREM64() local
2048 SDValue DIV = DAG.getBuildVector(MVT::v2i32, DL, {Res.getValue(0), Zero}); in LowerUDIVREM64()
2049 SDValue REM = DAG.getBuildVector(MVT::v2i32, DL, {Res.getValue(1), Zero}); in LowerUDIVREM64()
2136 SDValue C1 = DAG.getSelectCC(DL, Sub1_Hi, RHS_Hi, MinusOne, Zero, in LowerUDIVREM64()
2138 SDValue C2 = DAG.getSelectCC(DL, Sub1_Lo, RHS_Lo, MinusOne, Zero, in LowerUDIVREM64()
2152 Zero, Sub2_Lo.getValue(1)); in LowerUDIVREM64()
[all …]

12345678910>>...15