Searched refs:Zdn (Results 1 – 4 of 4) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | SVEInstrFormats.td | 1087 : I<(outs zprty:$Zdn), (ins zprty:$_Zdn, pprty:$Pm), 1088 asm, "\t$Zdn, $Pm", 1092 bits<5> Zdn; 1100 let Inst{4-0} = Zdn; 1102 let Constraints = "$Zdn = $_Zdn"; 1118 def : InstAlias<asm # "\t$Zdn, $Pm", 1119 (!cast<Instruction>(NAME # "_H") ZPR16:$Zdn, PPRAny:$Pm), 0>; 1120 def : InstAlias<asm # "\t$Zdn, $Pm", 1121 (!cast<Instruction>(NAME # "_S") ZPR32:$Zdn, PPRAny:$Pm), 0>; 1122 def : InstAlias<asm # "\t$Zdn, $Pm", [all …]
|
| H A D | SMEInstrFormats.td | 1962 : I<(outs vector_ty:$Zdn), (ins vector_ty:$_Zdn, zpr_ty:$Zm), 1963 mnemonic, "\t$Zdn, $_Zdn, $Zm", 1966 bits<4> Zdn; 1973 let Inst{4-1} = Zdn; 1976 let Constraints = "$Zdn = $_Zdn"; 2002 : I<(outs vector_ty:$Zdn), (ins vector_ty:$_Zdn, zpr_ty:$Zm), 2003 mnemonic, "\t$Zdn, $_Zdn, $Zm", 2006 bits<3> Zdn; 2013 let Inst{4-2} = Zdn; 2017 let Constraints = "$Zdn = $_Zdn"; [all …]
|
| H A D | AArch64ISelDAGToDAG.cpp | 1964 SDValue Zdn = GetMultiVecOperand(FirstVecIdx); in SelectDestructiveMultiIntrinsic() local 1975 N->getOperand(1), Zdn, Zm); in SelectDestructiveMultiIntrinsic() 1977 Intrinsic = CurDAG->getMachineNode(Opcode, DL, MVT::Untyped, Zdn, Zm); in SelectDestructiveMultiIntrinsic()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/Disassembler/ |
| H A D | AArch64Disassembler.cpp | 1702 unsigned Zdn = fieldFromInstruction(insn, 0, 5); in DecodeSVELogicalImmInstruction() local 1708 DecodeSimpleRegisterClass<AArch64::ZPRRegClassID, 0, 32>(Inst, Zdn, Addr, in DecodeSVELogicalImmInstruction() 1711 DecodeSimpleRegisterClass<AArch64::ZPRRegClassID, 0, 32>(Inst, Zdn, Addr, in DecodeSVELogicalImmInstruction()
|