Searched refs:ZReg (Results 1 – 7 of 7) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 1282 Register ZReg = Is32Bit ? AArch64::WZR : AArch64::XZR; in emitSelect() local 1290 True = ZReg; in emitSelect() 1291 False = ZReg; in emitSelect() 1298 True = ZReg; in emitSelect() 1299 False = ZReg; in emitSelect() 1310 False = ZReg; in emitSelect() 1319 False = ZReg; in emitSelect() 1330 False = ZReg; in emitSelect() 1337 False = ZReg; in emitSelect() 3453 const Register ZReg = AArch64::WZR; in select() local [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 5380 static inline bool isMatchingOrAlias(MCRegister ZReg, MCRegister Reg) { in isMatchingOrAlias() argument 5381 assert((ZReg >= AArch64::Z0) && (ZReg <= AArch64::Z31)); in isMatchingOrAlias() 5382 return (ZReg == ((Reg - AArch64::B0) + AArch64::Z0)) || in isMatchingOrAlias() 5383 (ZReg == ((Reg - AArch64::H0) + AArch64::Z0)) || in isMatchingOrAlias() 5384 (ZReg == ((Reg - AArch64::S0) + AArch64::Z0)) || in isMatchingOrAlias() 5385 (ZReg == ((Reg - AArch64::D0) + AArch64::Z0)) || in isMatchingOrAlias() 5386 (ZReg == ((Reg - AArch64::Q0) + AArch64::Z0)) || in isMatchingOrAlias() 5387 (ZReg == ((Reg - AArch64::Z0) + AArch64::Z0)); in isMatchingOrAlias()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64FastISel.cpp | 568 unsigned ZReg = Is64Bit ? AArch64::XZR : AArch64::WZR; in fastMaterializeFloatZero() local 570 return fastEmitInst_r(Opc, TLI.getRegClassFor(VT), ZReg); in fastMaterializeFloatZero() 4047 Register ZReg; in emitMul_rr() local 4055 Opc = AArch64::MADDWrrr; ZReg = AArch64::WZR; break; in emitMul_rr() 4057 Opc = AArch64::MADDXrrr; ZReg = AArch64::XZR; break; in emitMul_rr() 4062 return fastEmitInst_rrr(Opc, RC, Op0, Op1, ZReg); in emitMul_rr()
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| H A D | AArch64InstrInfo.cpp | 726 unsigned ZReg = removeCopies(MRI, DefMI->getOperand(1).getReg()); in canFoldIntoCSel() local 727 if (ZReg != AArch64::XZR && ZReg != AArch64::WZR) in canFoldIntoCSel() 745 unsigned ZReg = removeCopies(MRI, DefMI->getOperand(1).getReg()); in canFoldIntoCSel() local 746 if (ZReg != AArch64::XZR && ZReg != AArch64::WZR) in canFoldIntoCSel()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | Hexagon.td | 31 "Hexagon ZReg extension instructions">;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.cpp | 6200 MCRegister ZReg = in expandPostRAPseudo() local 6202 MIB->getOperand(0).setReg(ZReg); in expandPostRAPseudo()
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| H A D | X86ISelLowering.cpp | 36975 Register ZReg = MRI.createVirtualRegister(PtrRC); in emitSetJmpShadowStackFix() local 36978 .addDef(ZReg) in emitSetJmpShadowStackFix() 36979 .addReg(ZReg, RegState::Undef) in emitSetJmpShadowStackFix() 36980 .addReg(ZReg, RegState::Undef); in emitSetJmpShadowStackFix() 36985 BuildMI(*MBB, MI, MIMD, TII->get(RdsspOpc), SSPCopyReg).addReg(ZReg); in emitSetJmpShadowStackFix() 37223 Register ZReg = MRI.createVirtualRegister(&X86::GR32RegClass); in emitLongJmpShadowStackFix() local 37224 BuildMI(checkSspMBB, MIMD, TII->get(X86::MOV32r0), ZReg); in emitLongJmpShadowStackFix() 37230 .addReg(ZReg) in emitLongJmpShadowStackFix() 37232 ZReg = TmpZReg; in emitLongJmpShadowStackFix() 37238 BuildMI(checkSspMBB, MIMD, TII->get(RdsspOpc), SSPCopyReg).addReg(ZReg); in emitLongJmpShadowStackFix()
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