xref: /freebsd/sys/dev/cxgbe/common/t4_regs_values.h (revision 95ee2897e98f5d444f26ed2334cc7c439f9c16c6)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (c) 2011, 2016 Chelsio Communications, Inc.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  *
28  */
29 
30 #ifndef __T4_REGS_VALUES_H__
31 #define __T4_REGS_VALUES_H__
32 
33 /*
34  * This file contains definitions for various T4 register value hardware
35  * constants.  The types of values encoded here are predominantly those for
36  * register fields which control "modal" behavior.  For the most part, we do
37  * not include definitions for register fields which are simple numeric
38  * metrics, etc.
39  *
40  * These new "modal values" use a naming convention which matches the
41  * currently existing macros in t4_reg.h.  For register field FOO which would
42  * have S_FOO, M_FOO, V_FOO() and G_FOO() macros, we introduce X_FOO_{MODE}
43  * definitions.  These can be used as V_FOO(X_FOO_MODE) or as (G_FOO(x) ==
44  * X_FOO_MODE).
45  *
46  * Note that this should all be part of t4_regs.h but the toolset used to
47  * generate that file doesn't [yet] have the capability of collecting these
48  * constants.
49  */
50 
51 /*
52  * SGE definitions.
53  * ================
54  */
55 
56 /*
57  * SGE register field values.
58  */
59 
60 /* CONTROL register */
61 #define X_FLSPLITMODE_FLSPLITMIN	0
62 #define X_FLSPLITMODE_ETHHDR		1
63 #define X_FLSPLITMODE_IPHDR		2
64 #define X_FLSPLITMODE_TCPHDR		3
65 
66 #define X_DCASYSTYPE_FSB		0
67 #define X_DCASYSTYPE_CSI		1
68 
69 #define X_EGSTATPAGESIZE_64B		0
70 #define X_EGSTATPAGESIZE_128B		1
71 
72 #define X_RXPKTCPLMODE_DATA		0
73 #define X_RXPKTCPLMODE_SPLIT		1
74 
75 #define X_INGPCIEBOUNDARY_SHIFT		5
76 #define X_INGPCIEBOUNDARY_32B		0
77 #define X_INGPCIEBOUNDARY_64B		1
78 #define X_INGPCIEBOUNDARY_128B		2
79 #define X_INGPCIEBOUNDARY_256B		3
80 #define X_INGPCIEBOUNDARY_512B		4
81 #define X_INGPCIEBOUNDARY_1024B		5
82 #define X_INGPCIEBOUNDARY_2048B		6
83 #define X_INGPCIEBOUNDARY_4096B		7
84 
85 #define X_T6_INGPADBOUNDARY_SHIFT	3
86 #define X_T6_INGPADBOUNDARY_8B		0
87 #define X_T6_INGPADBOUNDARY_16B		1
88 #define X_T6_INGPADBOUNDARY_32B		2
89 #define X_T6_INGPADBOUNDARY_64B		3
90 #define X_T6_INGPADBOUNDARY_128B	4
91 #define X_T6_INGPADBOUNDARY_256B	5
92 #define X_T6_INGPADBOUNDARY_512B	6
93 #define X_T6_INGPADBOUNDARY_1024B	7
94 
95 #define X_INGPADBOUNDARY_SHIFT		5
96 #define X_INGPADBOUNDARY_32B		0
97 #define X_INGPADBOUNDARY_64B		1
98 #define X_INGPADBOUNDARY_128B		2
99 #define X_INGPADBOUNDARY_256B		3
100 #define X_INGPADBOUNDARY_512B		4
101 #define X_INGPADBOUNDARY_1024B		5
102 #define X_INGPADBOUNDARY_2048B		6
103 #define X_INGPADBOUNDARY_4096B		7
104 
105 #define X_EGRPCIEBOUNDARY_SHIFT		5
106 #define X_EGRPCIEBOUNDARY_32B		0
107 #define X_EGRPCIEBOUNDARY_64B		1
108 #define X_EGRPCIEBOUNDARY_128B		2
109 #define X_EGRPCIEBOUNDARY_256B		3
110 #define X_EGRPCIEBOUNDARY_512B		4
111 #define X_EGRPCIEBOUNDARY_1024B		5
112 #define X_EGRPCIEBOUNDARY_2048B		6
113 #define X_EGRPCIEBOUNDARY_4096B		7
114 
115 /* CONTROL2 register */
116 #define X_INGPACKBOUNDARY_SHIFT		5	// *most* of the values ...
117 #define X_INGPACKBOUNDARY_16B		0	// Note weird value!
118 #define X_INGPACKBOUNDARY_64B		1
119 #define X_INGPACKBOUNDARY_128B		2
120 #define X_INGPACKBOUNDARY_256B		3
121 #define X_INGPACKBOUNDARY_512B		4
122 #define X_INGPACKBOUNDARY_1024B		5
123 #define X_INGPACKBOUNDARY_2048B		6
124 #define X_INGPACKBOUNDARY_4096B		7
125 
126 /* GTS register */
127 #define SGE_TIMERREGS			6
128 #define X_TIMERREG_COUNTER0		0
129 #define X_TIMERREG_COUNTER1		1
130 #define X_TIMERREG_COUNTER2		2
131 #define X_TIMERREG_COUNTER3		3
132 #define X_TIMERREG_COUNTER4		4
133 #define X_TIMERREG_COUNTER5		5
134 #define X_TIMERREG_RESTART_COUNTER	6
135 #define X_TIMERREG_UPDATE_CIDX		7
136 
137 /*
138  * Egress Context field values
139  */
140 #define EC_WR_UNITS			16
141 
142 #define X_FETCHBURSTMIN_SHIFT		4
143 #define X_FETCHBURSTMIN_16B		0
144 #define X_FETCHBURSTMIN_32B		1
145 #define X_FETCHBURSTMIN_64B		2
146 #define X_FETCHBURSTMIN_128B		3
147 
148 /* T6 and later use a single-bit encoding for FetchBurstMin */
149 #define X_FETCHBURSTMIN_SHIFT_T6	6
150 #define X_FETCHBURSTMIN_64B_T6		0
151 #define X_FETCHBURSTMIN_128B_T6		1
152 
153 #define X_FETCHBURSTMAX_SHIFT		6
154 #define X_FETCHBURSTMAX_64B		0
155 #define X_FETCHBURSTMAX_128B		1
156 #define X_FETCHBURSTMAX_256B		2
157 #define X_FETCHBURSTMAX_512B		3
158 
159 #define X_HOSTFCMODE_NONE		0
160 #define X_HOSTFCMODE_INGRESS_QUEUE	1
161 #define X_HOSTFCMODE_STATUS_PAGE	2
162 #define X_HOSTFCMODE_BOTH		3
163 
164 #define X_HOSTFCOWNER_UP		0
165 #define X_HOSTFCOWNER_SGE		1
166 
167 #define X_CIDXFLUSHTHRESH_1		0
168 #define X_CIDXFLUSHTHRESH_2		1
169 #define X_CIDXFLUSHTHRESH_4		2
170 #define X_CIDXFLUSHTHRESH_8		3
171 #define X_CIDXFLUSHTHRESH_16		4
172 #define X_CIDXFLUSHTHRESH_32		5
173 #define X_CIDXFLUSHTHRESH_64		6
174 #define X_CIDXFLUSHTHRESH_128		7
175 
176 #define X_IDXSIZE_UNIT			64
177 
178 #define X_BASEADDRESS_ALIGN		512
179 
180 /*
181  * Ingress Context field values
182  */
183 #define X_UPDATESCHEDULING_TIMER	0
184 #define X_UPDATESCHEDULING_COUNTER_OPTTIMER	1
185 
186 #define X_UPDATEDELIVERY_NONE		0
187 #define X_UPDATEDELIVERY_INTERRUPT	1
188 #define X_UPDATEDELIVERY_STATUS_PAGE	2
189 #define X_UPDATEDELIVERY_BOTH		3
190 
191 #define X_INTERRUPTDESTINATION_PCIE	0
192 #define X_INTERRUPTDESTINATION_IQ	1
193 
194 #define X_QUEUEENTRYSIZE_16B		0
195 #define X_QUEUEENTRYSIZE_32B		1
196 #define X_QUEUEENTRYSIZE_64B		2
197 #define X_QUEUEENTRYSIZE_128B		3
198 
199 #define IC_SIZE_UNIT			16
200 #define IC_BASEADDRESS_ALIGN		512
201 
202 #define X_RSPD_TYPE_FLBUF		0
203 #define X_RSPD_TYPE_CPL			1
204 #define X_RSPD_TYPE_INTR		2
205 
206 /*
207  * Context field definitions.  This is by no means a complete list of SGE
208  * Context fields.  In the vast majority of cases the firmware initializes
209  * things the way they need to be set up.  But in a few small cases, we need
210  * to compute new values and ship them off to the firmware to be applied to
211  * the SGE Conexts ...
212  */
213 
214 /*
215  * Congestion Manager Definitions.
216  */
217 #define S_CONMCTXT_CNGTPMODE		19
218 #define M_CONMCTXT_CNGTPMODE		0x3
219 #define V_CONMCTXT_CNGTPMODE(x)		((x) << S_CONMCTXT_CNGTPMODE)
220 #define G_CONMCTXT_CNGTPMODE(x)  \
221 	(((x) >> S_CONMCTXT_CNGTPMODE) & M_CONMCTXT_CNGTPMODE)
222 #define S_CONMCTXT_CNGCHMAP		0
223 #define M_CONMCTXT_CNGCHMAP		0xffff
224 #define V_CONMCTXT_CNGCHMAP(x)		((x) << S_CONMCTXT_CNGCHMAP)
225 #define G_CONMCTXT_CNGCHMAP(x)   \
226 	(((x) >> S_CONMCTXT_CNGCHMAP) & M_CONMCTXT_CNGCHMAP)
227 
228 #define X_CONMCTXT_CNGTPMODE_DISABLE	0
229 #define X_CONMCTXT_CNGTPMODE_QUEUE	1
230 #define X_CONMCTXT_CNGTPMODE_CHANNEL	2
231 #define X_CONMCTXT_CNGTPMODE_BOTH	3
232 
233 /*
234  * T5 and later support a new BAR2-based doorbell mechanism for Egress Queues.
235  * The User Doorbells are each 128 bytes in length with a Simple Doorbell at
236  * offsets 8x and a Write Combining single 64-byte Egress Queue Unit
237  * (X_IDXSIZE_UNIT) Gather Buffer interface at offset 64.  For Ingress Queues,
238  * we have a Going To Sleep register at offsets 8x+4.
239  *
240  * As noted above, we have many instances of the Simple Doorbell and Going To
241  * Sleep registers at offsets 8x and 8x+4, respectively.  We want to use a
242  * non-64-byte aligned offset for the Simple Doorbell in order to attempt to
243  * avoid buffering of the writes to the Simple Doorbell and we want to use a
244  * non-contiguous offset for the Going To Sleep writes in order to avoid
245  * possible combining between them.
246  */
247 #define SGE_UDB_SIZE		128
248 #define SGE_UDB_KDOORBELL	8
249 #define SGE_UDB_GTS		20
250 #define SGE_UDB_WCDOORBELL	64
251 
252 /*
253  * CIM definitions.
254  * ================
255  */
256 
257 /*
258  * CIM register field values.
259  */
260 #define X_MBOWNER_NONE			0
261 #define X_MBOWNER_FW			1
262 #define X_MBOWNER_PL			2
263 #define X_MBOWNER_FW_DEFERRED		3
264 
265 /*
266  * PCI-E definitions.
267  * ==================
268  */
269 
270 #define X_WINDOW_SHIFT			10
271 #define X_PCIEOFST_SHIFT		10
272 
273 /*
274  * TP definitions.
275  * ===============
276  */
277 
278 /*
279  * TP_VLAN_PRI_MAP controls which subset of fields will be present in the
280  * Compressed Filter Tuple for LE filters.  Each bit set in TP_VLAN_PRI_MAP
281  * selects for a particular field being present.  These fields, when present
282  * in the Compressed Filter Tuple, have the following widths in bits.
283  */
284 #define S_FT_FIRST			S_FCOE
285 #define S_FT_LAST			S_FRAGMENTATION
286 
287 #define W_FT_FCOE			1
288 #define W_FT_PORT			3
289 #define W_FT_VNIC_ID			17
290 #define W_FT_VLAN			17
291 #define W_FT_TOS			8
292 #define W_FT_PROTOCOL			8
293 #define W_FT_ETHERTYPE			16
294 #define W_FT_MACMATCH			9
295 #define W_FT_MPSHITTYPE			3
296 #define W_FT_FRAGMENTATION		1
297 
298 #define M_FT_FCOE			((1ULL << W_FT_FCOE) - 1)
299 #define M_FT_PORT			((1ULL << W_FT_PORT) - 1)
300 #define M_FT_VNIC_ID			((1ULL << W_FT_VNIC_ID) - 1)
301 #define M_FT_VLAN			((1ULL << W_FT_VLAN) - 1)
302 #define M_FT_TOS			((1ULL << W_FT_TOS) - 1)
303 #define M_FT_PROTOCOL			((1ULL << W_FT_PROTOCOL) - 1)
304 #define M_FT_ETHERTYPE			((1ULL << W_FT_ETHERTYPE) - 1)
305 #define M_FT_MACMATCH			((1ULL << W_FT_MACMATCH) - 1)
306 #define M_FT_MPSHITTYPE			((1ULL << W_FT_MPSHITTYPE) - 1)
307 #define M_FT_FRAGMENTATION		((1ULL << W_FT_FRAGMENTATION) - 1)
308 
309 /*
310  * Some of the Compressed Filter Tuple fields have internal structure.  These
311  * bit shifts/masks describe those structures.  All shifts are relative to the
312  * base position of the fields within the Compressed Filter Tuple
313  */
314 #define S_FT_VLAN_VLD			16
315 #define V_FT_VLAN_VLD(x)		((x) << S_FT_VLAN_VLD)
316 #define F_FT_VLAN_VLD			V_FT_VLAN_VLD(1U)
317 
318 #define S_FT_VNID_ID_VF			0
319 #define M_FT_VNID_ID_VF			0x7fU
320 #define V_FT_VNID_ID_VF(x)		((x) << S_FT_VNID_ID_VF)
321 #define G_FT_VNID_ID_VF(x)		(((x) >> S_FT_VNID_ID_VF) & M_FT_VNID_ID_VF)
322 
323 #define S_FT_VNID_ID_PF			7
324 #define M_FT_VNID_ID_PF			0x7U
325 #define V_FT_VNID_ID_PF(x)		((x) << S_FT_VNID_ID_PF)
326 #define G_FT_VNID_ID_PF(x)		(((x) >> S_FT_VNID_ID_PF) & M_FT_VNID_ID_PF)
327 
328 #define S_FT_VNID_ID_VLD		16
329 #define V_FT_VNID_ID_VLD(x)		((x) << S_FT_VNID_ID_VLD)
330 #define F_FT_VNID_ID_VLD(x)		V_FT_VNID_ID_VLD(1U)
331 
332 #endif /* __T4_REGS_VALUES_H__ */
333