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Searched refs:XW (Results 1 – 12 of 12) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SchedExynosM3.td553 def : InstRW<[M3WriteFCVT4A], (instregex "^[SU]CVTF[SU][XW][DHS]ri")>;
554 def : InstRW<[M3WriteFCVT3A], (instregex "^FCVT[AMNPZ][SU]U[XW][DHS]r")>;
H A DAArch64SchedAmpere1.td853 def : InstRW<[Ampere1Write_2cyc_1AB_1S_1Z], (instregex "^STR[BHSDQ]ro[XW]")>;
923 def : InstRW<[Ampere1Write_10cyc_1XY_1Z], (instregex "^FCVT[AMNPZ][SU][SU][XW][HSD]r")>;
H A DAArch64SchedAmpere1B.td819 def : InstRW<[Ampere1BWrite_2cyc_1S_1Z], (instregex "^STR[BHSDQ]ro[XW]")>;
905 def : InstRW<[Ampere1BWrite_7cyc_1XY_1Z], (instregex "^FCVT[AMNPZ][SU][SU][XW][HSD]r")>;
H A DAArch64SchedExynosM4.td665 def : InstRW<[M4WriteFCVT6A], (instregex "^[SU]CVTF[SU][XW][HSD]ri")>;
666 def : InstRW<[M4WriteNEONR], (instregex "^FCVT[AMNPZ][SU][SU][XW][HSD]r")>;
H A DAArch64SchedExynosM5.td722 def : InstRW<[M5WriteFCVTC], (instregex "^[SU]CVTF[SU][XW][HSD]ri")>;
723 def : InstRW<[M5WriteFCVTB], (instregex "^FCVT[AMNPZ][SU][SU][XW][HSD]r")>;
H A DAArch64SchedOryon.td1370 def : InstRW<[ORYONWrite_I2V_7Cyc_I45], (instregex "^[SU]CVTF[SU][XW][HSD]ri")>;
1376 def : InstRW<[ORYONWrite_V2I_6Cyc_FP01], (instregex "^FCVT[AMNPZ][SU][SU][XW][HSD]r")>;
H A DAArch64SchedA57.td578 def : InstRW<[A57Write_10cyc_1L_1V], (instregex "^[FSU]CVT[AMNPZ][SU](_Int)?[SU]?[XW]?[DS]?[rds]i?")>;
H A DAArch64SchedNeoverseN1.td288 def : InstRW<[N1Write_1c_1B], (instregex "^[CT]BN?Z[XW]$")>;
H A DAArch64SchedA510.td577 (instregex "^(SQINC|SQDEC|UQINC|UQDEC)[BHWD]_[XW]Pi(Wd)?I")>;
H A DAArch64SchedNeoverseV1.td498 def : InstRW<[V1Write_1c_1B], (instregex "^[CT]BN?Z[XW]$")>;
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DEvergreenInstructions.td69 "MSKOR $rw_gpr.XW, $index_gpr",
/freebsd/contrib/llvm-project/llvm/lib/Analysis/
H A DScalarEvolution.cpp10223 APInt XW = X->sext(W); in MinOptional() local
10225 return XW.slt(YW) ? *X : *Y; in MinOptional()