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Searched refs:XMM (Results 1 – 21 of 21) sorted by relevance

/freebsd/crypto/openssl/crypto/aes/asm/
H A Dbsaes-armv7.pl71 my @XMM=map("q$_",(0..15));
596 veor @XMM[5], @t[5], @t[6]
597 veor @XMM[6], @t[6], @y[6] @ t[6]=y[6]
598 veor @XMM[2], @t[2], @t[6]
599 veor @XMM[7], @t[7], @y[7] @ t[7]=y[7]
601 vmov @XMM[0], @t[0]
602 vmov @XMM[1], @t[1]
603 @ vmov @XMM[2], @t[2]
604 vmov @XMM[3], @t[3]
605 vmov @XMM[4], @t[4]
[all …]
H A Dbsaes-x86_64.pl117 my @XMM=map("%xmm$_",(15,0..14)); # best on Atom, +10% over (0..15)
671 movdqa @t[0],@XMM[0]
672 movdqa @t[1],@XMM[1]
673 movdqa @t[2],@XMM[2]
674 movdqa @t[3],@XMM[3]
675 movdqa @t[4],@XMM[4]
676 movdqa @t[5],@XMM[5]
677 movdqa @t[6],@XMM[6]
678 movdqa @t[7],@XMM[7]
824 movdqa ($key), @XMM[9] # round 0 key
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrXOP.td16 [(set VR128:$dst, (Int VR128:$src))]>, XOP, Sched<[SchedWriteVecALU.XMM]>;
20 Sched<[SchedWriteVecALU.XMM.Folded, SchedWriteVecALU.XMM.ReadAfterFold]>;
80 SchedWriteFRnd.XMM>;
89 SchedWriteFRnd.XMM>;
126 defm VPROTB : xop3op<0x90, "vprotb", rotl, v16i8, SchedWriteVarVecShift.XMM>;
127 defm VPROTD : xop3op<0x92, "vprotd", rotl, v4i32, SchedWriteVarVecShift.XMM>;
128 defm VPROTQ : xop3op<0x93, "vprotq", rotl, v2i64, SchedWriteVarVecShift.XMM>;
129 defm VPROTW : xop3op<0x91, "vprotw", rotl, v8i16, SchedWriteVarVecShift.XMM>;
130 defm VPSHAB : xop3op<0x98, "vpshab", X86vpsha, v16i8, SchedWriteVarVecShift.XMM>;
[all...]
H A DX86Schedule.td84 X86FoldableSchedWrite XMM = s128; // XMM operations.
120 X86SchedWriteMoveLS XMM = s128; // XMM operations.
245 defm WriteFAddX : X86SchedWritePair<ReadAfterVecXLd>; // Floating point add/sub (XMM).
249 defm WriteFAdd64X : X86SchedWritePair<ReadAfterVecXLd>; // Floating point double add/sub (XMM).
253 defm WriteFCmpX : X86SchedWritePair<ReadAfterVecXLd>; // Floating point compare (XMM).
257 defm WriteFCmp64X : X86SchedWritePair<ReadAfterVecXLd>; // Floating point double compare (XMM).
263 defm WriteFMulX : X86SchedWritePair<ReadAfterVecXLd>; // Floating point multiplication (XMM).
267 defm WriteFMul64X : X86SchedWritePair<ReadAfterVecXLd>; // Floating point double multiplication (XMM)
[all...]
H A DX86InstrSSE.td201 Sched<[SchedWriteFShuffle.XMM]>;
208 Sched<[SchedWriteFShuffle.XMM]>;
298 // Move scalar to XMM zero-extended, zeroing a VR128 then do a
317 // Move scalar to XMM zero-extended, zeroing a VR128 then do a
354 SSEPackedSingle, SchedWriteFMoveLS.XMM>,
357 SSEPackedDouble, SchedWriteFMoveLS.XMM>,
360 SSEPackedSingle, SchedWriteFMoveLS.XMM>,
363 SSEPackedDouble, SchedWriteFMoveLS.XMM>,
382 SSEPackedSingle, SchedWriteFMoveLS.XMM>,
385 SSEPackedSingle, SchedWriteFMoveLS.XMM>,
[all …]
H A DX86CallingConv.td46 list<Register> XMM = [];
58 let XMM = [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7];
72 let XMM = [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7];
78 let XMM = [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
138 // float, double, float128 --> XMM
141 CCIfSubtarget<"hasSSE1()", CCAssignToReg<RC.XMM>>>,
146 // __m128, __m128i, __m128d --> XMM
149 CCIfSubtarget<"hasSSE1()", CCAssignToReg<RC.XMM>>>,
220 // float, double, float128 --> XMM
222 CCIfSubtarget<"hasSSE1()", CCAssignToReg<RC.XMM>>>,
[all …]
H A DX86ScheduleZnver3.td887 defm : Zn3WriteResXMMPair<WriteFAddX, [Zn3FPFAdd01], 3, [1], 1>; // Floating point add/sub (XMM).
891 …Zn3WriteResXMMPair<WriteFAdd64X, [Zn3FPFAdd01], 3, [1], 1>; // Floating point double add/sub (XMM).
895 defm : Zn3WriteResXMMPair<WriteFCmpX, [Zn3FPFMul01], 1, [1], 1>; // Floating point compare (XMM).
899 …Zn3WriteResXMMPair<WriteFCmp64X, [Zn3FPFMul01], 1, [1], 1>; // Floating point double compare (XMM).
905 …: Zn3WriteResXMMPair<WriteFMulX, [Zn3FPFMul01], 3, [1], 1>; // Floating point multiplication (XMM).
909 …eResXMMPair<WriteFMul64X, [Zn3FPFMul01], 3, [1], 1>; // Floating point double multiplication (XMM).
913 defm : Zn3WriteResXMMPair<WriteFDivX, [Zn3FPFDiv], 11, [3], 1>; // Floating point division (XMM).
917 …Zn3WriteResXMMPair<WriteFDiv64X, [Zn3FPFDiv], 13, [5], 1>; // Floating point double division (XMM).
921 …m : Zn3WriteResXMMPair<WriteFSqrtX, [Zn3FPFDiv], 15, [5], 1>; // Floating point square root (XMM).
925 …riteResXMMPair<WriteFSqrt64X, [Zn3FPFDiv], 21, [9], 1>; // Floating point double square root (XMM).
[all …]
H A DX86ScheduleZnver4.td898 defm : Zn4WriteResXMMPair<WriteFAddX, [Zn4FPFAdd01], 3, [1], 1>; // Floating point add/sub (XMM).
902 …Zn4WriteResXMMPair<WriteFAdd64X, [Zn4FPFAdd01], 3, [1], 1>; // Floating point double add/sub (XMM).
906 defm : Zn4WriteResXMMPair<WriteFCmpX, [Zn4FPFMul01], 2, [1], 1>; // Floating point compare (XMM).
910 …Zn4WriteResXMMPair<WriteFCmp64X, [Zn4FPFMul01], 2, [1], 1>; // Floating point double compare (XMM).
916 …: Zn4WriteResXMMPair<WriteFMulX, [Zn4FPFMul01], 3, [1], 1>; // Floating point multiplication (XMM).
920 …eResXMMPair<WriteFMul64X, [Zn4FPFMul01], 3, [1], 1>; // Floating point double multiplication (XMM).
924 defm : Zn4WriteResXMMPair<WriteFDivX, [Zn4FPFDiv], 11, [3], 1>; // Floating point division (XMM).
928 …Zn4WriteResXMMPair<WriteFDiv64X, [Zn4FPFDiv], 13, [5], 1>; // Floating point double division (XMM).
932 …m : Zn4WriteResXMMPair<WriteFSqrtX, [Zn4FPFDiv], 15, [5], 1>; // Floating point square root (XMM).
936 …riteResXMMPair<WriteFSqrt64X, [Zn4FPFDiv], 21, [9], 1>; // Floating point double square root (XMM).
[all …]
H A DX86InstrFMA.td106 VR128, OpTy128, f128mem, MemFrag128, Op, sched.XMM>;
108 VR128, OpTy128, f128mem, MemFrag128, Op, sched.XMM>;
110 VR128, OpTy128, f128mem, MemFrag128, Op, sched.XMM>;
477 REX_W, Sched<[sched.XMM]>;
484 Sched<[sched.XMM.Folded, sched.XMM.ReadAfterFold, sched.XMM.ReadAfterFold]>;
491 Sched<[sched.XMM.Folded, sched.XMM.ReadAfterFold,
496 sched.XMM.ReadAfterFold]>;
530 Sched<[sched.XMM]>;
H A DX86SchedBroadwell.td262 defm : BWWriteResPair<WriteFAddX, [BWPort1], 3, [1], 1, 5>; // Floating point add/sub (XMM).
266 …m : BWWriteResPair<WriteFAdd64X, [BWPort1], 3, [1], 1, 5>; // Floating point double add/sub (XMM).
271 defm : BWWriteResPair<WriteFCmpX, [BWPort1], 3, [1], 1, 5>; // Floating point compare (XMM).
275 …m : BWWriteResPair<WriteFCmp64X, [BWPort1], 3, [1], 1, 5>; // Floating point double compare (XMM).
283 …m : BWWriteResPair<WriteFMulX, [BWPort01], 3, [1], 1, 5>; // Floating point multiplication (XMM).
287 …riteResPair<WriteFMul64X, [BWPort01], 3, [1], 1, 5>; // Floating point double multiplication (XMM).
292 …teResPair<WriteFDivX, [BWPort0,BWFPDivider], 11, [1,5], 1, 5>; // Floating point division (XMM).
296 …teResPair<WriteFDiv64X, [BWPort0,BWFPDivider], 14, [1,8], 1, 5>; // Floating point division (XMM).
301 …BWWriteResPair<WriteFRcpX, [BWPort0], 5, [1], 1, 5>; // Floating point reciprocal estimate (XMM).
306 …ir<WriteFRsqrtX,[BWPort0], 5, [1], 1, 5>; // Floating point reciprocal square root estimate (XMM).
[all …]
H A DX86InstrAVX512.td649 // vinsertps - insert f32 to XMM
656 EVEX, VVVV, Sched<[SchedWriteFShuffle.XMM]>;
664 Sched<[SchedWriteFShuffle.XMM.Folded, SchedWriteFShuffle.XMM.ReadAfterFold]>;
1000 // vextractps - extract 32 bits from XMM
1898 defm Z128 : WriteFVarBlendask<opc, OpcodeStr, sched.XMM, VTInfo.info128>,
1899 WriteFVarBlendask_rmb<opc, OpcodeStr, sched.XMM, VTInfo.info128>,
1913 defm Z128 : WriteFVarBlendask<opc, OpcodeStr, sched.XMM, VTInfo.info128>,
2069 defm Z128 : avx512_icmp_packed<opc, OpcodeStr, sched.XMM,
2085 defm Z128 : avx512_icmp_packed_rmb<opc, OpcodeStr, sched.XMM,
2241 sched.XMM, VTInfo.info128, NAME>, EVEX_V128;
[all …]
H A DX86RegisterInfo.td341 // XMM Registers, used by the various SSE instruction set extensions.
385 def YMM#Index : X86Reg<"ymm"#Index, Index, [!cast<X86Reg>("XMM"#Index)]>,
386 DwarfRegAlias<!cast<X86Reg>("XMM"#Index)>;
391 def YMM#Index : X86Reg<"ymm"#Index, Index, [!cast<X86Reg>("XMM"#Index)]>,
392 DwarfRegAlias<!cast<X86Reg>("XMM"#Index)>;
401 DwarfRegAlias<!cast<X86Reg>("XMM"#Index)>;
735 def FR32 : RegisterClass<"X86", [f32], 32, (sequence "XMM%u", 0, 15)>;
799 def FR32X : RegisterClass<"X86", [f32], 32, (sequence "XMM%u", 0, 31)>;
H A DX86ScheduleZnver1.td890 //=== Integer MMX and XMM Instructions ===//
985 //=== Floating Point XMM and YMM Instructions ===//
1348 // AVX XMM Zero-idioms.
1386 // AVX XMM
H A DX86ScheduleZnver2.td900 //=== Integer MMX and XMM Instructions ===//
993 //=== Floating Point XMM and YMM Instructions ===//
1354 // AVX XMM Zero-idioms.
1392 // AVX XMM
H A DX86InstrMMX.td232 let SchedRW = [SchedWriteVecMoveLS.XMM.RR] in {
H A DX86SchedHaswell.td860 //=== Floating Point XMM and YMM Instructions ===//
/freebsd/sys/cddl/dev/dtrace/x86/
H A Ddis_tables.c194 XMM, /* SIMD xmm/mem -> xmm */ enumerator
729 /* [10] */ TNSZ("movupd",XMM,16), TNSZ("movupd",XMMS,16), TNSZ("movlpd",XMMM,8), TNSZ("movlpd",XM…
730 /* [14] */ TNSZ("unpcklpd",XMM,16),TNSZ("unpckhpd",XMM,16),TNSZ("movhpd",XMMM,8), TNSZ("movhpd",X…
736 /* [28] */ TNSZ("movapd",XMM,16), TNSZ("movapd",XMMS,16), TNSZ("cvtpi2pd",XMMOMX,8),TNSZ("movntpd…
737 … TNSZ("cvttpd2pi",XMMXMM,16),TNSZ("cvtpd2pi",XMMXMM,16),TNSZ("ucomisd",XMM,8),TNSZ("comisd",XMM,8),
749 /* [50] */ TNS("movmskpd",XMMOX3), TNSZ("sqrtpd",XMM,16), INVALID, INVALID,
750 /* [54] */ TNSZ("andpd",XMM,16), TNSZ("andnpd",XMM,16), TNSZ("orpd",XMM,16), TNSZ("xorpd",XMM,16),
751 /* [58] */ TNSZ("addpd",XMM,16), TNSZ("mulpd",XMM,16), TNSZ("cvtpd2ps",XMM,16),TNSZ("cvtps2dq",XM…
752 /* [5C] */ TNSZ("subpd",XMM,16), TNSZ("minpd",XMM,16), TNSZ("divpd",XMM,16), TNSZ("maxpd",XMM,16),
754 /* [60] */ TNSZ("punpcklbw",XMM,16),TNSZ("punpcklwd",XMM,16),TNSZ("punpckldq",XMM,16),TNSZ("packs…
[all …]
/freebsd/crypto/openssl/doc/man3/
H A DOPENSSL_ia32cap.pod32 =item bit #24, FXSR bit, denoting availability of XMM registers;
66 clearing bit #24 disables SSE2 code operating on 128-bit XMM register
69 enable XMM registers. Historically address of the capability vector copy
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64CallingConvention.td262 // The first 4 FP/Vector arguments are passed in XMM registers.
326 // can only be used by ABI non-compliant code. If the target doesn't have XMM
/freebsd/crypto/openssl/
H A DNEWS.md79 * Fix POLY1305 MAC implementation corrupting XMM registers on Windows
H A DCHANGES.md219 depend on the contents of non-volatile XMM registers at all, to the worst
254 * Fix POLY1305 MAC implementation corrupting XMM registers on Windows.
257 does not save the contents of non-volatile XMM registers on Windows 64
259 returning to the caller all the XMM registers are set to zero rather than
265 depend on the contents of non-volatile XMM registers at all, to the worst