| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUSwLowerLDS.cpp | 652 } else if (AtomicCmpXchgInst *XCHG = dyn_cast<AtomicCmpXchgInst>(&Inst)) { in getLDSMemoryInstructions() local
653 if (XCHG->getPointerAddressSpace() == AMDGPUAS::LOCAL_ADDRESS) in getLDSMemoryInstructions()
720 } else if (AtomicCmpXchgInst *XCHG = dyn_cast<AtomicCmpXchgInst>(Inst)) { in translateLDSMemoryOperationsToGlobalMemory() local
721 Value *XCHGPtrOperand = XCHG->getPointerOperand(); in translateLDSMemoryOperationsToGlobalMemory()
725 Replacement, XCHG->getCompareOperand(), XCHG->getNewValOperand(), in translateLDSMemoryOperationsToGlobalMemory()
726 XCHG->getAlign(), XCHG->getSuccessOrdering(), in translateLDSMemoryOperationsToGlobalMemory()
727 XCHG->getFailureOrdering(), XCHG->getSyncScopeID()); in translateLDSMemoryOperationsToGlobalMemory()
728 NewXCHG->setVolatile(XCHG->isVolatile()); in translateLDSMemoryOperationsToGlobalMemory()
730 XCHG->replaceAllUsesWith(NewXCHG); in translateLDSMemoryOperationsToGlobalMemory()
731 XCHG->eraseFromParent(); in translateLDSMemoryOperationsToGlobalMemory()
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| H A D | AMDGPUAsanInstrumentation.cpp | 233 } else if (AtomicCmpXchgInst *XCHG = dyn_cast<AtomicCmpXchgInst>(I)) { in getInterestingMemoryOperands() local
234 Interesting.emplace_back(I, XCHG->getPointerOperandIndex(), true, in getInterestingMemoryOperands()
235 XCHG->getCompareOperand()->getType(), in getInterestingMemoryOperands()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Instrumentation/ |
| H A D | MemProfInstrumentation.cpp | 315 } else if (AtomicCmpXchgInst *XCHG = dyn_cast<AtomicCmpXchgInst>(I)) { in isInterestingMemoryAccess() local
319 Access.AccessTy = XCHG->getCompareOperand()->getType(); in isInterestingMemoryAccess()
320 Access.Addr = XCHG->getPointerOperand(); in isInterestingMemoryAccess()
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| H A D | HWAddressSanitizer.cpp | 882 } else if (AtomicCmpXchgInst *XCHG = dyn_cast<AtomicCmpXchgInst>(I)) { in getInterestingMemoryOperands() local
883 if (!ClInstrumentAtomics || ignoreAccess(ORE, I, XCHG->getPointerOperand())) in getInterestingMemoryOperands()
885 Interesting.emplace_back(I, XCHG->getPointerOperandIndex(), true, in getInterestingMemoryOperands()
886 XCHG->getCompareOperand()->getType(), in getInterestingMemoryOperands()
907 if (AtomicCmpXchgInst *XCHG = dyn_cast<AtomicCmpXchgInst>(I)) in getPointerOperandIndex() local
908 return XCHG->getPointerOperandIndex(); in getPointerOperandIndex()
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| H A D | AddressSanitizer.cpp | 1492 } else if (AtomicCmpXchgInst *XCHG = dyn_cast<AtomicCmpXchgInst>(I)) { in getInterestingMemoryOperands() local
1493 if (!ClInstrumentAtomics || ignoreAccess(I, XCHG->getPointerOperand())) in getInterestingMemoryOperands()
1495 Interesting.emplace_back(I, XCHG->getPointerOperandIndex(), true, in getInterestingMemoryOperands()
1496 XCHG->getCompareOperand()->getType(), in getInterestingMemoryOperands()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ScheduleZnver2.td | 526 // XCHG.
532 def : InstRW<[Zn2WriteXCHG], (instregex "^XCHG(8|16|32|64)rr", "^XCHG(16|32|64)ar")>;
539 def : InstRW<[Zn2WriteXCHGrm, ReadAfterLd], (instregex "^XCHG(8|16|32|64)rm")>;
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| H A D | X86ScheduleZnver1.td | 527 // XCHG.
533 def : InstRW<[ZnWriteXCHGrm, ReadAfterLd], (instregex "XCHG(8|16|32|64)rm")>;
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| H A D | X86ScheduleAtom.td | 624 "XCHG(8|16|32|64)rm",
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| H A D | X86ScheduleBtVer2.td | 460 // atomic XCHG operations. We need two writes because the instruction latency
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| H A D | X86SchedSkylakeClient.td | 1287 def: InstRW<[SKLWriteResGroup143], (instregex "XCHG(8|16|32|64)rm")>;
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| H A D | X86SchedBroadwell.td | 1146 def: InstRW<[BWWriteResGroup99], (instregex "XCHG(8|16|32|64)rm")>;
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| H A D | X86SchedHaswell.td | 1308 def: InstRW<[HWWriteResGroup68], (instregex "XCHG(8|16|32|64)rm")>;
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| H A D | X86SchedLunarlakeP.td | 1987 def : InstRW<[LNLPWriteResGroupX273, WriteRMW], (instregex "^XCHG(16|32)rm$")>;
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| H A D | X86SchedSkylakeServer.td | 1827 def: InstRW<[SKXWriteResGroup157], (instregex "XCHG(8|16|32|64)rm")>;
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| H A D | X86SchedAlderlakeP.td | 2365 def : InstRW<[ADLPWriteResGroup273, WriteRMW], (instregex "^XCHG(16|32)rm$")>;
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| H A D | X86SchedIceLake.td | 1857 def: InstRW<[ICXWriteResGroup157], (instregex "XCHG(8|16|32|64)rm")>;
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| H A D | X86InstrMisc.td | 850 defm XCHG : ATOMIC_SWAP<0x86, 0x87, "xchg", "atomic_swap">;
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| H A D | X86SchedSapphireRapids.td | 5092 def : InstRW<[SPRWriteResGroup560, WriteRMW], (instregex "^XCHG(16|32)rm$")>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFInstrInfo.td | 1066 class XCHG<BPFWidthModifer SizeOp, string OpcodeStr, PatFrag OpNode>
1105 def XCHGD : XCHG<BPF_DW, "64", atomic_swap_i64>;
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