| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMParallelDSP.cpp | 774 LoadInst *WideLoad = IRB.CreateAlignedLoad(LoadTy, VecPtr, Base->getAlign()); in CreateWideLoad() local
778 MoveBefore(VecPtr, WideLoad); in CreateWideLoad()
783 Value *Bottom = IRB.CreateTrunc(WideLoad, Base->getType()); in CreateWideLoad()
789 Value *Top = IRB.CreateLShr(WideLoad, ShiftVal); in CreateWideLoad()
797 << *WideLoad << "\n" in CreateWideLoad()
804 std::make_unique<WidenedLoad>(Loads, WideLoad))); in CreateWideLoad()
805 return WideLoad; in CreateWideLoad()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPURegBankLegalizeHelper.cpp | 118 auto WideLoad = B.buildLoad({DstRB, WideTy}, Base, *WideMMO); in widenLoad() local
121 B.buildTrunc(Dst, WideLoad); in widenLoad()
124 auto Unmerge = B.buildUnmerge({DstRB, MergeTy}, WideLoad); in widenLoad()
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| H A D | AMDGPURegisterBankInfo.cpp | 1099 auto WideLoad = B.buildLoadFromOffset(S32, PtrReg, *MMO, 0); in applyMappingLoad() local
1100 B.buildSExtInReg(MI.getOperand(0), WideLoad, MemSize); in applyMappingLoad()
1103 auto WideLoad = B.buildLoadFromOffset(S32, PtrReg, *MMO, 0); in applyMappingLoad() local
1104 B.buildZExtInReg(MI.getOperand(0), WideLoad, MemSize); in applyMappingLoad()
1121 auto WideLoad = B.buildLoadFromOffset(WiderTy, PtrReg, *MMO, 0); in applyMappingLoad() local
1123 B.buildTrunc(MI.getOperand(0), WideLoad); in applyMappingLoad()
1126 WideLoad); in applyMappingLoad()
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| H A D | AMDGPULegalizerInfo.cpp | 3184 Register WideLoad; in legalizeLoad() local
3186 WideLoad = B.buildLoadFromOffset(WideTy, PtrReg, *MMO, 0).getReg(0); in legalizeLoad()
3187 B.buildTrunc(ValReg, WideLoad).getReg(0); in legalizeLoad()
3194 WideLoad = B.buildLoadFromOffset(WideTy, PtrReg, *MMO, 0).getReg(0); in legalizeLoad()
3195 B.buildExtract(ValReg, WideLoad, 0); in legalizeLoad()
3199 WideLoad = B.buildLoadFromOffset(WideTy, PtrReg, *MMO, 0).getReg(0); in legalizeLoad()
3200 B.buildDeleteTrailingVectorElements(ValReg, WideLoad); in legalizeLoad()
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| H A D | AMDGPUISelLowering.cpp | 1908 SDValue WideLoad = DAG.getExtLoad( in WidenOrSplitVectorLoad() local
1912 {DAG.getNode(ISD::EXTRACT_SUBVECTOR, SL, VT, WideLoad, in WidenOrSplitVectorLoad()
1914 WideLoad.getValue(1)}, in WidenOrSplitVectorLoad()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
| H A D | VPlanTransforms.cpp | 3279 auto *WideLoad = cast<VPWidenLoadRecipe>(R); in narrowInterleaveGroups() local
3283 auto *N = new VPReplicateRecipe(&WideLoad->getIngredient(), in narrowInterleaveGroups()
3284 WideLoad->operands(), /*IsUniform*/ true, in narrowInterleaveGroups()
3285 /*Mask*/ nullptr, *WideLoad); in narrowInterleaveGroups()
3286 N->insertBefore(WideLoad); in narrowInterleaveGroups()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 15655 SDValue WideLoad; in combineBVOfConsecutiveLoads() local
15659 WideLoad = DAG.getLoad(N->getValueType(0), dl, FirstLoad->getChain(), in combineBVOfConsecutiveLoads()
15662 ReturnSDVal = WideLoad; in combineBVOfConsecutiveLoads()
15666 WideLoad = DAG.getLoad(N->getValueType(0), dl, LastLoad->getChain(), in combineBVOfConsecutiveLoads()
15673 ReturnSDVal = DAG.getVectorShuffle(N->getValueType(0), dl, WideLoad, in combineBVOfConsecutiveLoads()
15679 DAG.makeEquivalentMemoryOrdering(LD, WideLoad); in combineBVOfConsecutiveLoads()
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