Searched refs:WR8 (Results 1 – 5 of 5) sorted by relevance
| /freebsd/sys/riscv/sifive/ |
| H A D | sifive_ccache.c | 58 #define WR8(sc, off, val) (bus_write_8((sc)->res, (off), (val))) macro
154 WR8(sc, SIFIVE_CCACHE_WAYENABLE, (ways - 1)); in ccache_attach()
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| /freebsd/sys/riscv/iommu/ |
| H A D | iommu.c | 66 #define WR8(sc, reg, val) bus_write_8(sc->res[0], (reg), (val)) macro
360 WR8(sc, RISCV_IOMMU_DDTP, base); in riscv_iommu_set_mode()
437 WR8(sc, base, q->base); in riscv_iommu_init_queue()
862 WR8(sc, RISCV_IOMMU_ICVEC, 0 << 0 | 1 << 4 | 2 << 8 | 3 << 12); in riscv_iommu_setup_interrupts()
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| /freebsd/sys/arm64/arm64/ |
| H A D | cmn600.c | 54 #define WR8(sc, r, v) bus_write_8((sc)->sc_res[0], (r), (v)) macro
195 WR8(nd->sc, nd->nd_offset + reg, val); in cmn600_node_write8()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/Disassembler/ |
| H A D | HexagonDisassembler.cpp | 714 Hexagon::WR7, Hexagon::W8, Hexagon::WR8, Hexagon::W9, Hexagon::WR9, in DecodeHvxWRRegisterClass()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonRegisterInfo.td | 260 def WR8 : Rd<17, "v16:17", [V16, V17, VFR8]>, DwarfRegNum<[169]>;
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