Searched refs:VectorVT (Results 1 – 4 of 4) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VVPInstrPatternsVec.td | 597 multiclass Reduce_GenericInt<ValueType VectorVT, 602 VectorVT:$vx, (v256i1 true_mask), i32:$vl)), 610 VectorVT:$vx, v256i1:$vm, i32:$vl)), 617 multiclass IntReduce_ShortLong<ValueType VectorVT, 620 defm: Reduce_GenericInt<VectorVT, ResRC, ResVT, "or", "VROR">; 621 defm: Reduce_GenericInt<VectorVT, ResRC, ResVT, "and", "VRAND">; 622 defm: Reduce_GenericInt<VectorVT, ResRC, ResVT, "xor", "VRXOR">; 623 defm: Reduce_GenericInt<VectorVT, ResRC, ResVT, "add", "VSUM"#SumSuffix>; 624 defm: Reduce_GenericInt<VectorVT, ResRC, ResVT, "smax", "VRMAX"#MinMaxSuffix>;
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 211 const MVT VectorVT = VectorEVT.getSimpleVT(); in getVectorLoweringShape() local 213 if (!VectorVT.isVector()) { in getVectorLoweringShape() 214 if (VectorVT == MVT::i128 || VectorVT == MVT::f128) in getVectorLoweringShape() 219 const MVT EltVT = VectorVT.getVectorElementType(); in getVectorLoweringShape() 220 const unsigned NumElts = VectorVT.getVectorNumElements(); in getVectorLoweringShape() 228 switch (VectorVT.SimpleTy) { in getVectorLoweringShape() 2173 EVT VectorVT = Vector.getValueType(); in LowerEXTRACT_VECTOR_ELT() local 2175 if (VectorVT == MVT::v4i8) { in LowerEXTRACT_VECTOR_ELT() 2191 assert(NVPTX::isPackedVectorTy(VectorVT) && in LowerEXTRACT_VECTOR_ELT() 2192 VectorVT.getVectorNumElements() == 2 && "Unexpected vector type."); in LowerEXTRACT_VECTOR_ELT() [all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 15330 EVT VectorVT = getPromotedVTForPredicate(VT); in LowerINSERT_VECTOR_ELT() local 15333 DAG.getAnyExtOrTrunc(Op.getOperand(0), DL, VectorVT); in LowerINSERT_VECTOR_ELT() 15336 VectorVT.getScalarType().getSizeInBits() < 32 in LowerINSERT_VECTOR_ELT() 15338 : VectorVT.getScalarType()); in LowerINSERT_VECTOR_ELT() 15340 DAG.getNode(ISD::INSERT_VECTOR_ELT, DL, VectorVT, ExtendedVector, in LowerINSERT_VECTOR_ELT() 15362 EVT VectorVT = getPromotedVTForPredicate(VT); in LowerEXTRACT_VECTOR_ELT() local 15365 DAG.getNode(ISD::ANY_EXTEND, DL, VectorVT, Op.getOperand(0)); in LowerEXTRACT_VECTOR_ELT() 15366 MVT ExtractTy = VectorVT == MVT::nxv2i64 ? MVT::i64 : MVT::i32; in LowerEXTRACT_VECTOR_ELT() 24056 EVT VectorVT = Vector.getValueType(); in performSTORECombine() local 24057 EVT ElemVT = VectorVT.getVectorElementType(); in performSTORECombine() [all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 7058 const SDLoc &dl, EVT &VT, EVT VectorVT, in isVMOVModifiedImm() argument 7061 bool is128Bits = VectorVT.is128BitVector(); in isVMOVModifiedImm()
|