| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULibFunc.cpp | 389 P.ArgType = AMDGPULibFunc::I32; P.VectorSize = 4; break; in getNextParam()
391 P.ArgType = AMDGPULibFunc::U32; P.VectorSize = 4; break; in getNextParam()
393 P.ArgType = AMDGPULibFunc::F32; P.VectorSize = 4; break; in getNextParam()
412 P.VectorSize = 2; P.PtrKind = AMDGPULibFunc::BYVALUE; break; in getNextParam()
414 P.VectorSize = 3; P.PtrKind = AMDGPULibFunc::BYVALUE; break; in getNextParam()
416 P.VectorSize = 4; P.PtrKind = AMDGPULibFunc::BYVALUE; break; in getNextParam()
418 P.VectorSize = 8; P.PtrKind = AMDGPULibFunc::BYVALUE; break; in getNextParam()
420 P.VectorSize = 16; P.PtrKind = AMDGPULibFunc::BYVALUE; break; in getNextParam()
437 case AMDGPULibFunc::IMG1DA: P.VectorSize = 2; break; in getNextParam()
438 case AMDGPULibFunc::IMG1DB: P.VectorSize = 1; break; in getNextParam()
[all …]
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| H A D | AMDGPULibFunc.h | 295 unsigned char VectorSize = 1; member
302 VectorSize = 1; in reset()
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| H A D | AMDGPULibCalls.cpp | 398 return FInfo.getLeads()[0].VectorSize; in getVecSize()
460 nf.getLeads()[0].VectorSize = FInfo.getLeads()[0].VectorSize; in sincosUseNative()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonAsmPrinter.cpp | 246 unsigned VectorSize, MCContext &Ctx) { in ScaleVectorOffset() argument
257 auto *NewCE = MCConstantExpr::create(V / int32_t(VectorSize), Ctx); in ScaleVectorOffset()
270 unsigned VectorSize = HRI.getRegSizeInBits(Hexagon::HvxVRRegClass) / 8; in HexagonProcessInstruction() local
639 MappedInst = ScaleVectorOffset(Inst, 3, VectorSize, OutContext); in HexagonProcessInstruction()
649 MappedInst = ScaleVectorOffset(Inst, 2, VectorSize, OutContext); in HexagonProcessInstruction()
657 MappedInst = ScaleVectorOffset(Inst, 2, VectorSize, OutContext); in HexagonProcessInstruction()
665 MappedInst = ScaleVectorOffset(Inst, 1, VectorSize, OutContext); in HexagonProcessInstruction()
680 MappedInst = ScaleVectorOffset(Inst, 4, VectorSize, OutContext); in HexagonProcessInstruction()
695 MappedInst = ScaleVectorOffset(Inst, 3, VectorSize, OutContext); in HexagonProcessInstruction()
712 MappedInst = ScaleVectorOffset(Inst, 3, VectorSize, OutContext); in HexagonProcessInstruction()
[all …]
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| H A D | HexagonInstrInfo.cpp | 2813 unsigned VectorSize = TRI->getSpillSize(Hexagon::HvxVRRegClass); in isValidOffset() local
2814 assert(isPowerOf2_32(VectorSize)); in isValidOffset()
2815 if (Offset & (VectorSize-1)) in isValidOffset()
2817 return isInt<4>(Offset >> Log2_32(VectorSize)); in isValidOffset()
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| /freebsd/contrib/llvm-project/clang/lib/CodeGen/ |
| H A D | ABIInfo.cpp | 286 bool SwiftABIInfo::isLegalVectorType(CharUnits VectorSize, llvm::Type *EltTy, in isLegalVectorType() argument
290 return (VectorSize.getQuantity() > 8 && VectorSize.getQuantity() <= 16); in isLegalVectorType()
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| H A D | ABIInfo.h | 160 virtual bool isLegalVectorType(CharUnits VectorSize, llvm::Type *EltTy,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InterleavedAccess.cpp | 435 int VectorSize = VT.getSizeInBits(); in createShuffleStride() local
437 int LaneCount = std::max(VectorSize / 128, 1); in createShuffleStride()
448 int VectorSize = VT.getSizeInBits(); in setGroupSize() local
449 int VF = VT.getVectorNumElements() / std::max(VectorSize / 128, 1); in setGroupSize()
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| /freebsd/contrib/llvm-project/clang/lib/CodeGen/Targets/ |
| H A D | ARM.cpp | 101 bool isLegalVectorType(CharUnits VectorSize, llvm::Type *EltTy,
745 bool ARMSwiftABIInfo::isLegalVectorType(CharUnits VectorSize, llvm::Type *EltTy, in isLegalVectorType() argument
752 if (VectorSize.getQuantity() != 8 && in isLegalVectorType()
753 (VectorSize.getQuantity() != 16 || NumElts == 1)) in isLegalVectorType()
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| H A D | AArch64.cpp | 116 bool isLegalVectorType(CharUnits VectorSize, llvm::Type *EltTy,
647 bool AArch64SwiftABIInfo::isLegalVectorType(CharUnits VectorSize, in isLegalVectorType() argument
652 if (VectorSize.getQuantity() != 8 && in isLegalVectorType()
653 (VectorSize.getQuantity() != 16 || NumElts == 1)) in isLegalVectorType()
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| /freebsd/contrib/llvm-project/clang/utils/TableGen/ |
| H A D | ClangOpenCLBuiltinEmitter.cpp | 258 int VectorSize) const;
979 int VectorSize) const { in getTypeString()
1013 if (VectorSize > 1) { in getTypeString()
1014 S += std::to_string(VectorSize); in getTypeString()
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| H A D | NeonEmitter.cpp | 1657 int64_t VectorSize = cast<IntInit>(Expr->getArg(0))->getValue(); in emitDagShuffle() local
1658 VectorSize /= ElementSize; in emitDagShuffle()
1661 for (unsigned VI = 0; VI < Elts2.size(); VI += VectorSize) { in emitDagShuffle()
1662 for (int LI = VectorSize - 1; LI >= 0; --LI) { in emitDagShuffle()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | LegalizerInfo.h | 1038 unsigned VectorSize) { in widenVectorEltsToVectorMinSize() argument
1045 return VecTy.isFixedVector() && VecTy.getSizeInBits() < VectorSize; in widenVectorEltsToVectorMinSize()
1050 unsigned MinSize = VectorSize / NumElts; in widenVectorEltsToVectorMinSize()
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| /freebsd/contrib/llvm-project/clang/lib/Sema/ |
| H A D | SemaDeclAttr.cpp | 4883 llvm::APInt VectorSize(64, 0); in AddModeAttr() local
4892 !Str.substr(1, VectorStringLength).getAsInteger(10, VectorSize) && in AddModeAttr()
4893 VectorSize.isPowerOf2()) { in AddModeAttr()
4900 VectorSize = 0; in AddModeAttr()
4904 if (!VectorSize) in AddModeAttr()
4944 VectorSize.getBoolValue()) { in AddModeAttr()
4987 if (VectorSize.getBoolValue()) { in AddModeAttr()
4988 NewTy = Context.getVectorType(NewTy, VectorSize.getZExtValue(), in AddModeAttr()
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| H A D | TreeTransform.h | 17263 IntegerLiteral *VectorSize in RebuildExtVectorType() local
17266 return SemaRef.BuildExtVectorType(ElementType, VectorSize, AttributeLoc); in RebuildExtVectorType()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | SROA.cpp | 2323 unsigned VectorSize = DL.getTypeSizeInBits(VTy).getFixedValue(); in createAndCheckVectorTypesForPromotion() local
2326 if (TypeSize != VectorSize && TypeSize != ElementSize && in createAndCheckVectorTypesForPromotion()
2327 VectorSize % TypeSize == 0) { in createAndCheckVectorTypesForPromotion()
2328 VectorType *NewVTy = VectorType::get(Ty, VectorSize / TypeSize, false); in createAndCheckVectorTypesForPromotion()
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| /freebsd/contrib/llvm-project/clang/lib/CodeGen/TargetBuiltins/ |
| H A D | ARM.cpp | 1643 int VectorSize = 0; in LookupNeonLLVMIntrinsic() local
1645 VectorSize = 64; in LookupNeonLLVMIntrinsic()
1647 VectorSize = 128; in LookupNeonLLVMIntrinsic()
1655 Ty, VectorSize ? VectorSize / Ty->getPrimitiveSizeInBits() : 1); in LookupNeonLLVMIntrinsic()
1662 int Elts = VectorSize ? VectorSize / ArgType->getPrimitiveSizeInBits() : 1; in LookupNeonLLVMIntrinsic()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVInstructionSelector.cpp | 4113 uint64_t VectorSize = Type->getOperand(2).getImm(); in widenTypeToVec4() local
4114 if (VectorSize == 4) in widenTypeToVec4()
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| /freebsd/contrib/llvm-project/clang/include/clang/Basic/ |
| H A D | Attr.td | 3746 def VectorSize : TypeAttr {
|