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Searched refs:VecReduceOp0 (Results 1 – 1 of 1) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp18107 SDValue VecReduceOp0 = N->getOperand(0); in performVecReduceAddCombineWithUADDLP() local
18110 if (VecReduceOp0.getOpcode() == ISD::ZERO_EXTEND && in performVecReduceAddCombineWithUADDLP()
18111 VecReduceOp0->getValueType(0) == MVT::v16i32 && in performVecReduceAddCombineWithUADDLP()
18112 VecReduceOp0->getOperand(0)->getOpcode() == ISD::ABS && in performVecReduceAddCombineWithUADDLP()
18113 VecReduceOp0->getOperand(0)->getValueType(0) == MVT::v16i16) { in performVecReduceAddCombineWithUADDLP()
18115 VecReduceOp0 = VecReduceOp0.getOperand(0); in performVecReduceAddCombineWithUADDLP()
18121 unsigned Opcode = VecReduceOp0.getOpcode(); in performVecReduceAddCombineWithUADDLP()
18122 if (Opcode != ISD::ABS || VecReduceOp0->getValueType(0) != AbsInputVT) in performVecReduceAddCombineWithUADDLP()
18125 SDValue ABS = VecReduceOp0; in performVecReduceAddCombineWithUADDLP()