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Searched refs:VecInRegOpc (Results 1 – 1 of 1) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp48592 unsigned VecInRegOpc = IsSigned ? ISD::SIGN_EXTEND_VECTOR_INREG in combineVectorPack() local
48594 if (N0.getOpcode() == VecInRegOpc && N1.isUndef() && in combineVectorPack()