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Searched refs:VecElems (Results 1 – 2 of 2) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InterleavedAccess.cpp286 unsigned VecElems, unsigned Stride, in reorderSubVector() argument
289 if (VecElems == 16) { in reorderSubVector()
298 for (unsigned i = 0; i < (VecElems / 16) * Stride; i += 2) { in reorderSubVector()
306 if (VecElems == 32) { in reorderSubVector()
520 unsigned VecElems, IRBuilder<> &Builder) { in concatSubVector() argument
521 if (VecElems == 16) { in concatSubVector()
527 for (unsigned j = 0; j < VecElems / 32; j++) in concatSubVector()
532 if (VecElems == 32) in concatSubVector()
541 unsigned VecElems) { in deinterleave8bitStride3() argument
566 concatSubVector(Vec, InVec, VecElems, Builder); in deinterleave8bitStride3()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorTypes.cpp1672 unsigned VecElems = VecVT.getVectorMinNumElements(); in SplitVecRes_INSERT_SUBVECTOR() local
1688 IdxVal >= LoElems && IdxVal + SubElems <= VecElems) { in SplitVecRes_INSERT_SUBVECTOR()