Searched refs:VTSize (Results 1 – 11 of 11) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMSelectionDAGInfo.cpp | 204 unsigned VTSize = 4; in EmitTargetCodeForMemcpy() local 242 DstPtrInfo = DstPtrInfo.getWithOffset(NumRegs * VTSize); in EmitTargetCodeForMemcpy() 243 SrcPtrInfo = SrcPtrInfo.getWithOffset(NumRegs * VTSize); in EmitTargetCodeForMemcpy() 263 VTSize = getRemainingSize(BytesLeft); in EmitTargetCodeForMemcpy() 270 SrcOff += VTSize; in EmitTargetCodeForMemcpy() 271 BytesLeft -= VTSize; in EmitTargetCodeForMemcpy() 279 VTSize = getRemainingSize(BytesLeft); in EmitTargetCodeForMemcpy() 285 DstOff += VTSize; in EmitTargetCodeForMemcpy() 286 BytesLeft -= VTSize; in EmitTargetCodeForMemcpy()
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| H A D | ARMCallLowering.cpp | 83 unsigned VTSize = VT.getSimpleVT().getSizeInBits(); in isSupportedType() local 85 if (VTSize == 64) in isSupportedType() 89 return VTSize == 1 || VTSize == 8 || VTSize == 16 || VTSize == 32; in isSupportedType()
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| H A D | ARMISelLowering.cpp | 8319 uint64_t VTSize = VT.getFixedSizeInBits(); in ReconstructShuffle() local 8320 if (SrcVTSize == VTSize) in ReconstructShuffle() 8326 unsigned NumSrcElts = VTSize / EltVT.getFixedSizeInBits(); in ReconstructShuffle() 8329 if (SrcVTSize < VTSize) { in ReconstructShuffle() 8330 if (2 * SrcVTSize != VTSize) in ReconstructShuffle() 8340 if (SrcVTSize != 2 * VTSize) in ReconstructShuffle()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeIntegerTypes.cpp | 1238 unsigned VTSize = VT.getScalarSizeInBits(); in earlyExpandDIVFIX() local 1247 EVT WideVT = EVT::getIntegerVT(*DAG.getContext(), VTSize * 2); in earlyExpandDIVFIX() 1260 assert(SatW <= VTSize && in earlyExpandDIVFIX() 1262 Res = SaturateWidenedDIVFIX(Res, dl, SatW == 0 ? VTSize : SatW, Signed, in earlyExpandDIVFIX() 4471 unsigned VTSize = VT.getScalarSizeInBits(); in ExpandIntRes_MULFIX() local 4492 APInt MinVal = APInt::getSignedMinValue(VTSize); in ExpandIntRes_MULFIX() 4493 APInt MaxVal = APInt::getSignedMaxValue(VTSize); in ExpandIntRes_MULFIX() 4506 APInt MaxVal = APInt::getMaxValue(VTSize); in ExpandIntRes_MULFIX() 4517 assert(Scale <= VTSize && "Scale can't be larger than the value type size."); in ExpandIntRes_MULFIX() 4540 assert((VTSize == NVTSize * 2) && "Expected the new value type to be half " in ExpandIntRes_MULFIX() [all …]
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| H A D | TargetLowering.cpp | 248 unsigned VTSize = VT.getSizeInBits() / 8; in findOptimalMemOpLowering() local 249 while (VTSize > Size) { in findOptimalMemOpLowering() 286 VTSize = Size; in findOptimalMemOpLowering() 289 VTSize = NewVTSize; in findOptimalMemOpLowering() 297 Size -= VTSize; in findOptimalMemOpLowering() 11148 unsigned VTSize = VT.getScalarSizeInBits(); in expandFixedPointMul() local 11162 APInt MinVal = APInt::getSignedMinValue(VTSize); in expandFixedPointMul() 11163 APInt MaxVal = APInt::getSignedMaxValue(VTSize); in expandFixedPointMul() 11178 APInt MaxVal = APInt::getMaxValue(VTSize); in expandFixedPointMul() 11184 assert(((Signed && Scale < VTSize) || (!Signed && Scale <= VTSize)) && in expandFixedPointMul() [all …]
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| H A D | SelectionDAG.cpp | 8461 unsigned VTSize = VT.getSizeInBits() / 8; in getMemcpyLoadsAndStores() local 8464 if (VTSize > Size) { in getMemcpyLoadsAndStores() 8468 SrcOff -= VTSize - Size; in getMemcpyLoadsAndStores() 8469 DstOff -= VTSize - Size; in getMemcpyLoadsAndStores() 8487 SubSlice.Length = VTSize; in getMemcpyLoadsAndStores() 8509 SrcPtrInfo.getWithOffset(SrcOff).isDereferenceable(VTSize, C, DL); in getMemcpyLoadsAndStores() 8529 SrcOff += VTSize; in getMemcpyLoadsAndStores() 8530 DstOff += VTSize; in getMemcpyLoadsAndStores() 8531 Size -= VTSize; in getMemcpyLoadsAndStores() 8651 unsigned VTSize = VT.getSizeInBits() / 8; in getMemmoveLoadsAndStores() local [all …]
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| H A D | DAGCombiner.cpp | 21046 TypeSize VTSize = VT.getSizeInBits(); in TransformFPLoadStorePair() local 21050 if (VTSize.isScalable()) in TransformFPLoadStorePair() 21054 EVT IntVT = EVT::getIntegerVT(*DAG.getContext(), VTSize.getFixedValue()); in TransformFPLoadStorePair() 24156 uint64_t VTSize = VT.getFixedSizeInBits(); in createBuildVecShuffle() local 24166 if ((VTSize % InVT1Size == 0) && InVT1 == InVT2) { in createBuildVecShuffle() 24169 unsigned NumConcats = VTSize / InVT1Size; in createBuildVecShuffle() 24176 } else if (InVT1Size == VTSize * 2) { in createBuildVecShuffle() 24211 } else if (InVT2Size * 2 == VTSize && InVT1Size == VTSize) { in createBuildVecShuffle() 24215 } else if (InVT1Size / VTSize > 1 && InVT1Size % VTSize == 0) { in createBuildVecShuffle() 24236 ShuffleNumElems = InVT1Size / VTSize * NumElems; in createBuildVecShuffle()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 4545 uint64_t VTSize = VT.getFixedSizeInBits(); in LowerVectorFP_TO_INT() local 4547 if (VTSize < InVTSize) { in LowerVectorFP_TO_INT() 4562 if (VTSize > InVTSize) { in LowerVectorFP_TO_INT() 4862 uint64_t VTSize = VT.getFixedSizeInBits(); in LowerVectorINT_TO_FP() local 4864 if (VTSize < InVTSize) { in LowerVectorINT_TO_FP() 4902 if (VTSize > InVTSize) { in LowerVectorINT_TO_FP() 12547 uint64_t VTSize = VT.getFixedSizeInBits(); in getRegForInlineAsmConstraint() local 12548 if (VTSize == 16) in getRegForInlineAsmConstraint() 12550 if (VTSize == 32) in getRegForInlineAsmConstraint() 12552 if (VTSize == 64) in getRegForInlineAsmConstraint() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
| H A D | SLPVectorizer.cpp | 10754 size_t VTSize = DL->getTypeStoreSizeInBits(getWidenedType(EltTy, N)); in canMapToVector() local 10755 if (VTSize < MinVecRegSize || VTSize > MaxVecRegSize || in canMapToVector() 10756 VTSize != DL->getTypeStoreSizeInBits(T)) in canMapToVector()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 9603 unsigned VTSize = VT.getSizeInBits(); in isValidMtVsrBmi() local 9604 APInt ConstValue(VTSize, 0); in isValidMtVsrBmi() 9617 IsLittleEndian ? BitPos : VTSize - EltWidth - BitPos); in isValidMtVsrBmi()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 19891 unsigned VTSize = VT.getSizeInBits(); in lowerFPToIntToFP() local 19894 MVT VecVT = MVT::getVectorVT(VT, 128 / VTSize); in lowerFPToIntToFP() 19900 IntSize != VTSize ? X86ISD::CVTSI2P : (unsigned)ISD::SINT_TO_FP; in lowerFPToIntToFP()
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