Home
last modified time | relevance | path

Searched refs:VTList (Results 1 – 16 of 16) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAG.cpp688 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { in AddNodeIDValueTypes() argument
689 ID.AddPointer(VTList.VTs); in AddNodeIDValueTypes()
711 SDVTList VTList, ArrayRef<SDValue> OpList) { in AddNodeIDNode() argument
713 AddNodeIDValueTypes(ID, VTList); in AddNodeIDNode()
8636 SDVTList VTList, ArrayRef<SDValue> Ops, in getAtomic() argument
8640 AddNodeIDNode(ID, Opcode, VTList, Ops); in getAtomic()
8650 VTList, MemVT, MMO); in getAtomic()
8725 unsigned Opcode, const SDLoc &dl, SDVTList VTList, ArrayRef<SDValue> Ops, in getMemIntrinsicNode() argument
8736 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, MemVT, MMO); in getMemIntrinsicNode()
8740 SDVTList VTList, in getMemIntrinsicNode() argument
[all …]
H A DLegalizeIntegerTypes.cpp3393 SDVTList VTList = DAG.getVTList(NVT, getSetCCResultType(NVT)); in ExpandIntRes_ADDSUB() local
3395 Lo = DAG.getNode(ISD::UADDO, dl, VTList, LoOps); in ExpandIntRes_ADDSUB()
3398 ? DAG.getNode(ISD::UADDO, dl, VTList, ArrayRef(HiOps, 2)) in ExpandIntRes_ADDSUB()
3399 : DAG.getNode(ISD::UADDO_CARRY, dl, VTList, HiOps); in ExpandIntRes_ADDSUB()
3401 Lo = DAG.getNode(ISD::USUBO, dl, VTList, LoOps); in ExpandIntRes_ADDSUB()
3404 ? DAG.getNode(ISD::USUBO, dl, VTList, ArrayRef(HiOps, 2)) in ExpandIntRes_ADDSUB()
3405 : DAG.getNode(ISD::USUBO_CARRY, dl, VTList, HiOps); in ExpandIntRes_ADDSUB()
3421 SDVTList VTList = DAG.getVTList(NVT, MVT::Glue); in ExpandIntRes_ADDSUB() local
3423 Lo = DAG.getNode(ISD::ADDC, dl, VTList, LoOps); in ExpandIntRes_ADDSUB()
3425 Hi = DAG.getNode(ISD::ADDE, dl, VTList, HiOps); in ExpandIntRes_ADDSUB()
[all …]
H A DSelectionDAGISel.cpp2752 MorphNode(SDNode *Node, unsigned TargetOpc, SDVTList VTList, in MorphNode() argument
2773 SDNode *Res = CurDAG->MorphNodeTo(Node, ~TargetOpc, VTList, Ops); in MorphNode()
4084 SDVTList VTList; in SelectCodeCommon() local
4086 VTList = CurDAG->getVTList(VTs[0]); in SelectCodeCommon()
4088 VTList = CurDAG->getVTList(VTs[0], VTs[1]); in SelectCodeCommon()
4090 VTList = CurDAG->getVTList(VTs); in SelectCodeCommon()
4145 VTList, Ops); in SelectCodeCommon()
4164 Res = cast<MachineSDNode>(MorphNode(NodeToMatch, TargetOpc, VTList, in SelectCodeCommon()
H A DScheduleDAGSDNodes.cpp150 SDVTList VTList = DAG->getVTList(VTs); in CloneNodeWithValues() local
158 DAG->MorphNodeTo(N, N->getOpcode(), VTList, Ops); in CloneNodeWithValues()
H A DTargetLowering.cpp7842 SDVTList VTList = DAG.getVTList(HiLoVT, SetCCType); in expandDIVREMByConstant() local
7843 Sum = DAG.getNode(ISD::UADDO, dl, VTList, LL, LH); in expandDIVREMByConstant()
7844 Sum = DAG.getNode(ISD::UADDO_CARRY, dl, VTList, Sum, in expandDIVREMByConstant()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DSelectionDAG.h1140 SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList,
1146 SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList,
1169 SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList);
1170 SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N);
1171 SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1,
1173 SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1,
1175 SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1,
1177 SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1,
1313 SDVTList VTList, ArrayRef<SDValue> Ops,
1321 unsigned Opcode, const SDLoc &dl, SDVTList VTList, ArrayRef<SDValue> Ops,
[all …]
H A DSelectionDAGISel.h484 SDNode *MorphNode(SDNode *Node, unsigned TargetOpc, SDVTList VTList,
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelDAGToDAG.cpp237 SDVTList VTList = CurDAG->getVTList(VT, MVT::Other); in matchLoadD16FromBuildVector() local
253 CurDAG->getMemIntrinsicNode(LoadOp, SDLoc(LdHi), VTList, in matchLoadD16FromBuildVector()
271 SDVTList VTList = CurDAG->getVTList(VT, MVT::Other); in matchLoadD16FromBuildVector() local
287 CurDAG->getMemIntrinsicNode(LoadOp, SDLoc(LdLo), VTList, in matchLoadD16FromBuildVector()
867 SDVTList VTList = CurDAG->getVTList(MVT::i32, MVT::Glue); in SelectADD_SUB_I64() local
881 AddLo = CurDAG->getMachineNode(Opc, DL, VTList, Args); in SelectADD_SUB_I64()
884 AddLo = CurDAG->getMachineNode(CarryOpc, DL, VTList, Args); in SelectADD_SUB_I64()
891 SDNode *AddHi = CurDAG->getMachineNode(CarryOpc, DL, VTList, AddHiArgs); in SelectADD_SUB_I64()
H A DSIISelLowering.cpp4241 SDVTList VTList = DAG.getVTList(MVT::i32, MVT::Other); in lowerGET_FPENV() local
4244 SDValue GetModeReg = DAG.getNode(ISD::INTRINSIC_W_CHAIN, SL, VTList, in lowerGET_FPENV()
4246 SDValue GetTrapReg = DAG.getNode(ISD::INTRINSIC_W_CHAIN, SL, VTList, in lowerGET_FPENV()
5959 SDVTList VTList = DAG.getVTList(EquivLoadVT, MVT::Other); in adjustLoadValueType() local
5964 VTList, Ops, M->getMemoryVT(), in adjustLoadValueType()
6005 SDVTList VTList = DAG.getVTList(CastVT, MVT::Other); in lowerIntrinsicLoad() local
6006 SDValue MemNode = getMemIntrinsicNode(Opc, DL, VTList, Ops, CastVT, in lowerIntrinsicLoad()
8340 SDVTList VTList = DAG.getVTList({LoadVT, MVT::Glue}); in lowerSBuffer() local
8350 Loads.push_back(getMemIntrinsicNode(AMDGPUISD::BUFFER_LOAD, DL, VTList, Ops, in lowerSBuffer()
9357 SDVTList VTList, in getMemIntrinsicNode() argument
[all …]
H A DSIISelLowering.h128 SDValue getMemIntrinsicNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList,
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp2670 SDVTList VTList = DAG.getVTList(VT, VT); in lowerShiftRightParts() local
2673 DL, VTList, Cond, ShiftRightHi, in lowerShiftRightParts()
2692 SDVTList VTList = DAG.getVTList(VT, MVT::Other); in createLoadLR() local
2699 return DAG.getMemIntrinsicNode(Opc, DL, VTList, Ops, MemVT, in createLoadLR()
2773 SDVTList VTList = DAG.getVTList(MVT::Other); in createStoreLR() local
2780 return DAG.getMemIntrinsicNode(Opc, DL, VTList, Ops, MemVT, in createStoreLR()
/freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/
H A DCodeGenDAGPatterns.cpp76 TypeSetByHwMode::TypeSetByHwMode(ArrayRef<ValueTypeByHwMode> VTList) { in TypeSetByHwMode() argument
78 if (!VTList.empty()) in TypeSetByHwMode()
79 AddrSpace = VTList[0].PtrAddrSpace; in TypeSetByHwMode()
81 for (const ValueTypeByHwMode &VVT : VTList) in TypeSetByHwMode()
H A DCodeGenDAGPatterns.h198 TypeSetByHwMode(ArrayRef<ValueTypeByHwMode> VTList);
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp4625 SDVTList VTList = DAG.getVTList(WideVT, MVT::Other); in lowerATOMIC_LOAD_OP() local
4628 SDValue AtomicOp = DAG.getMemIntrinsicNode(Opcode, DL, VTList, Ops, in lowerATOMIC_LOAD_OP()
4708 SDVTList VTList = DAG.getVTList(WideVT, MVT::i32, MVT::Other); in lowerATOMIC_CMP_SWAP() local
4712 VTList, Ops, NarrowVT, MMO); in lowerATOMIC_CMP_SWAP()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp5703 SDVTList VTList = DAG.getVTList(MVT::Other, MVT::Glue); in OptimizeVFPBrcond() local
5705 return DAG.getNode(ARMISD::BCC_i64, dl, VTList, Ops); in OptimizeVFPBrcond()
5820 SDVTList VTList = DAG.getVTList(MVT::Other, MVT::Glue); in LowerBR_CC() local
5822 SDValue Res = DAG.getNode(ARMISD::BRCOND, dl, VTList, Ops); in LowerBR_CC()
5826 Res = DAG.getNode(ARMISD::BRCOND, dl, VTList, Ops); in LowerBR_CC()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp11029 SDVTList VTList = Op->getVTList(); in lowerVectorStrictFSetcc()
11032 SDValue Tmp1 = DAG.getNode(ISD::STRICT_FSETCCS, DL, VTList, Chain, Op1, in lowerVectorStrictFSetcc()
11034 SDValue Tmp2 = DAG.getNode(ISD::STRICT_FSETCCS, DL, VTList, Chain, Op2, in lowerVectorStrictFSetcc()
11047 SDValue OEQ = DAG.getNode(ISD::STRICT_FSETCCS, DL, VTList, Chain, Op1, in lowerVectorStrictFSetcc()
11027 SDVTList VTList = Op->getVTList(); lowerVectorStrictFSetcc() local