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Searched refs:VTList (Results 1 – 15 of 15) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAG.cpp713 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { in AddNodeIDValueTypes() argument
714 ID.AddPointer(VTList.VTs); in AddNodeIDValueTypes()
736 SDVTList VTList, ArrayRef<SDValue> OpList) { in AddNodeIDNode() argument
738 AddNodeIDValueTypes(ID, VTList); in AddNodeIDNode()
9214 SDVTList VTList, ArrayRef<SDValue> Ops, in getAtomic() argument
9218 AddNodeIDNode(ID, Opcode, VTList, Ops); in getAtomic()
9221 dl.getIROrder(), Opcode, VTList, MemVT, MMO, ExtType)); in getAtomic()
9232 VTList, MemVT, MMO, ExtType); in getAtomic()
9303 unsigned Opcode, const SDLoc &dl, SDVTList VTList, ArrayRef<SDValue> Ops, in getMemIntrinsicNode() argument
9314 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, MemVT, MMO); in getMemIntrinsicNode()
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H A DLegalizeIntegerTypes.cpp3590 SDVTList VTList = DAG.getVTList(NVT, getSetCCResultType(NVT)); in ExpandIntRes_ADDSUB() local
3592 Lo = DAG.getNode(ISD::UADDO, dl, VTList, LoOps); in ExpandIntRes_ADDSUB()
3596 : DAG.getNode(ISD::UADDO_CARRY, dl, VTList, HiOps); in ExpandIntRes_ADDSUB()
3598 Lo = DAG.getNode(ISD::USUBO, dl, VTList, LoOps); in ExpandIntRes_ADDSUB()
3602 : DAG.getNode(ISD::USUBO_CARRY, dl, VTList, HiOps); in ExpandIntRes_ADDSUB()
3618 SDVTList VTList = DAG.getVTList(NVT, MVT::Glue); in ExpandIntRes_ADDSUB() local
3620 Lo = DAG.getNode(ISD::ADDC, dl, VTList, LoOps); in ExpandIntRes_ADDSUB()
3622 Hi = DAG.getNode(ISD::ADDE, dl, VTList, HiOps); in ExpandIntRes_ADDSUB()
3624 Lo = DAG.getNode(ISD::SUBC, dl, VTList, LoOps); in ExpandIntRes_ADDSUB()
3626 Hi = DAG.getNode(ISD::SUBE, dl, VTList, HiOps); in ExpandIntRes_ADDSUB()
[all …]
H A DSelectionDAGISel.cpp2809 MorphNode(SDNode *Node, unsigned TargetOpc, SDVTList VTList, in MorphNode() argument
2830 SDNode *Res = CurDAG->MorphNodeTo(Node, ~TargetOpc, VTList, Ops); in MorphNode()
4143 SDVTList VTList; in SelectCodeCommon() local
4145 VTList = CurDAG->getVTList(VTs[0]); in SelectCodeCommon()
4147 VTList = CurDAG->getVTList(VTs[0], VTs[1]); in SelectCodeCommon()
4149 VTList = CurDAG->getVTList(VTs); in SelectCodeCommon()
4204 VTList, Ops); in SelectCodeCommon()
4223 Res = cast<MachineSDNode>(MorphNode(NodeToMatch, TargetOpc, VTList, in SelectCodeCommon()
H A DScheduleDAGSDNodes.cpp150 SDVTList VTList = DAG->getVTList(VTs); in CloneNodeWithValues() local
158 DAG->MorphNodeTo(N, N->getOpcode(), VTList, Ops); in CloneNodeWithValues()
H A DTargetLowering.cpp8061 SDVTList VTList = DAG.getVTList(HiLoVT, SetCCType); in expandDIVREMByConstant() local
8062 Sum = DAG.getNode(ISD::UADDO, dl, VTList, LL, LH); in expandDIVREMByConstant()
8063 Sum = DAG.getNode(ISD::UADDO_CARRY, dl, VTList, Sum, in expandDIVREMByConstant()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DSelectionDAG.h1206 LLVM_ABI SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList,
1212 LLVM_ABI SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList,
1242 LLVM_ABI SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList);
1243 LLVM_ABI SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList,
1245 LLVM_ABI SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList,
1247 LLVM_ABI SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList,
1249 LLVM_ABI SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList,
1251 LLVM_ABI SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList,
1388 SDVTList VTList, ArrayRef<SDValue> Ops,
1401 unsigned Opcode, const SDLoc &dl, SDVTList VTList, ArrayRef<SDValue> Ops,
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H A DSelectionDAGISel.h493 SDNode *MorphNode(SDNode *Node, unsigned TargetOpc, SDVTList VTList,
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelDAGToDAG.cpp233 SDVTList VTList = CurDAG->getVTList(VT, MVT::Other); in matchLoadD16FromBuildVector() local
249 CurDAG->getMemIntrinsicNode(LoadOp, SDLoc(LdHi), VTList, in matchLoadD16FromBuildVector()
267 SDVTList VTList = CurDAG->getVTList(VT, MVT::Other); in matchLoadD16FromBuildVector() local
283 CurDAG->getMemIntrinsicNode(LoadOp, SDLoc(LdLo), VTList, in matchLoadD16FromBuildVector()
983 SDVTList VTList = CurDAG->getVTList(MVT::i32, MVT::Glue); in SelectADD_SUB_I64() local
997 AddLo = CurDAG->getMachineNode(Opc, DL, VTList, Args); in SelectADD_SUB_I64()
1000 AddLo = CurDAG->getMachineNode(CarryOpc, DL, VTList, Args); in SelectADD_SUB_I64()
1007 SDNode *AddHi = CurDAG->getMachineNode(CarryOpc, DL, VTList, AddHiArgs); in SelectADD_SUB_I64()
H A DSIISelLowering.cpp4457 SDVTList VTList = DAG.getVTList(MVT::i32, MVT::Other); in lowerGET_FPENV() local
4460 SDValue GetModeReg = DAG.getNode(ISD::INTRINSIC_W_CHAIN, SL, VTList, in lowerGET_FPENV()
4462 SDValue GetTrapReg = DAG.getNode(ISD::INTRINSIC_W_CHAIN, SL, VTList, in lowerGET_FPENV()
6305 SDVTList VTList = DAG.getVTList(EquivLoadVT, MVT::Other); in adjustLoadValueType() local
6308 IsIntrinsic ? (unsigned)ISD::INTRINSIC_W_CHAIN : Opcode, DL, VTList, Ops, in adjustLoadValueType()
6349 SDVTList VTList = DAG.getVTList(CastVT, MVT::Other); in lowerIntrinsicLoad() local
6350 SDValue MemNode = getMemIntrinsicNode(Opc, DL, VTList, Ops, CastVT, in lowerIntrinsicLoad()
8930 SDVTList VTList = DAG.getVTList({LoadVT, MVT::Other}); in lowerSBuffer() local
8940 Loads.push_back(getMemIntrinsicNode(AMDGPUISD::BUFFER_LOAD, DL, VTList, Ops, in lowerSBuffer()
9999 SDVTList VTList, in getMemIntrinsicNode() argument
[all …]
H A DSIISelLowering.h128 SDValue getMemIntrinsicNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList,
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp2822 SDVTList VTList = DAG.getVTList(VT, VT); in lowerShiftRightParts() local
2825 DL, VTList, Cond, ShiftRightHi, in lowerShiftRightParts()
2844 SDVTList VTList = DAG.getVTList(VT, MVT::Other); in createLoadLR() local
2851 return DAG.getMemIntrinsicNode(Opc, DL, VTList, Ops, MemVT, in createLoadLR()
2925 SDVTList VTList = DAG.getVTList(MVT::Other); in createStoreLR() local
2932 return DAG.getMemIntrinsicNode(Opc, DL, VTList, Ops, MemVT, in createStoreLR()
/freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/
H A DCodeGenDAGPatterns.cpp77 TypeSetByHwMode::TypeSetByHwMode(ArrayRef<ValueTypeByHwMode> VTList) { in TypeSetByHwMode() argument
79 if (!VTList.empty()) in TypeSetByHwMode()
80 AddrSpace = VTList[0].PtrAddrSpace; in TypeSetByHwMode()
82 for (const ValueTypeByHwMode &VVT : VTList) in TypeSetByHwMode()
H A DCodeGenDAGPatterns.h196 TypeSetByHwMode(ArrayRef<ValueTypeByHwMode> VTList);
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp5117 SDVTList VTList = DAG.getVTList(WideVT, MVT::Other); in lowerATOMIC_LOAD_OP() local
5120 SDValue AtomicOp = DAG.getMemIntrinsicNode(Opcode, DL, VTList, Ops, in lowerATOMIC_LOAD_OP()
5200 SDVTList VTList = DAG.getVTList(WideVT, MVT::i32, MVT::Other); in lowerATOMIC_CMP_SWAP() local
5204 VTList, Ops, NarrowVT, MMO); in lowerATOMIC_CMP_SWAP()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp12748 SDVTList VTList = Op->getVTList(); in lowerVectorStrictFSetcc() local
12751 SDValue Tmp1 = DAG.getNode(ISD::STRICT_FSETCCS, DL, VTList, Chain, Op1, in lowerVectorStrictFSetcc()
12753 SDValue Tmp2 = DAG.getNode(ISD::STRICT_FSETCCS, DL, VTList, Chain, Op2, in lowerVectorStrictFSetcc()
12766 SDValue OEQ = DAG.getNode(ISD::STRICT_FSETCCS, DL, VTList, Chain, Op1, in lowerVectorStrictFSetcc()