| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMInstrMVE.td | 315 multiclass MVE_TwoOpPattern<MVEVectorVTInfo VTI, SDPatternOperator Op, Intrinsic PredInt, 319 def : Pat<(VTI.Vec (Op (VTI.Vec MQPR:$Qm), (VTI.Vec MQPR:$Qn))), 320 (VTI.Vec (Inst (VTI.Vec MQPR:$Qm), (VTI.Vec MQPR:$Qn)))>; 323 if !ne(VTI.Size, 0b11) then { 324 def : Pat<(VTI.Vec (vselect (VTI.Pred VCCR:$mask), 325 (VTI.Vec (Op (VTI.Vec MQPR:$Qm), 326 (VTI.Vec MQPR:$Qn))), 327 (VTI.Vec MQPR:$inactive))), 328 (VTI.Vec (Inst (VTI.Vec MQPR:$Qm), (VTI.Vec MQPR:$Qn), 329 ARMVCCThen, (VTI.Pred VCCR:$mask), zero_reg, [all …]
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| H A D | ARMInstrCDE.td | 610 multiclass VCXPredicatedPat_m<MVEVectorVTInfo VTI> { 611 def : Pat<(VTI.Vec (int_arm_cde_vcx1q_predicated timm:$coproc, 612 (VTI.Vec MQPR:$inactive), timm:$imm, 613 (VTI.Pred VCCR:$pred))), 614 (VTI.Vec (CDE_VCX1_vec p_imm:$coproc, imm_12b:$imm, ARMVCCThen, 615 (VTI.Pred VCCR:$pred), zero_reg, 616 (VTI.Vec MQPR:$inactive)))>; 617 def : Pat<(VTI.Vec (int_arm_cde_vcx1qa_predicated timm:$coproc, 618 (VTI.Vec MQPR:$acc), timm:$imm, 619 (VTI.Pred VCCR:$pred))), [all …]
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| /freebsd/contrib/llvm-project/compiler-rt/lib/ubsan/ |
| H A D | ubsan_type_hash_itanium.cpp | 140 const abi::__vmi_class_type_info *VTI = in isDerivedFromAtOffset() local 142 if (!VTI) in isDerivedFromAtOffset() 147 for (unsigned int base = 0; base != VTI->base_count; ++base) { in isDerivedFromAtOffset() 150 sptr OffsetHere = VTI->base_info[base].__offset_flags >> in isDerivedFromAtOffset() 152 if (VTI->base_info[base].__offset_flags & in isDerivedFromAtOffset() 158 if (isDerivedFromAtOffset(VTI->base_info[base].__base_type, in isDerivedFromAtOffset() 177 const abi::__vmi_class_type_info *VTI = in findBaseAtOffset() local 179 if (!VTI) in findBaseAtOffset() 183 for (unsigned int base = 0; base != VTI->base_count; ++base) { in findBaseAtOffset() 184 sptr OffsetHere = VTI->base_info[base].__offset_flags >> in findBaseAtOffset() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrAVX10.td | 59 multiclass avx10_minmax_packed_base<string OpStr, X86VectorVTInfo VTI, SDNode OpNode> { 60 let ExeDomain = VTI.ExeDomain, Uses = [MXCSR], mayRaiseFPException = 1 in { 61 defm rri : AVX512_maskable<0x52, MRMSrcReg, VTI, (outs VTI.RC:$dst), 62 (ins VTI.RC:$src1, VTI.RC:$src2, i32u8imm:$src3), OpStr, 64 (VTI.VT (OpNode VTI.RC:$src1, VTI.RC:$src2, 67 defm rmi : AVX512_maskable<0x52, MRMSrcMem, VTI, (outs VTI.RC:$dst), 68 (ins VTI.RC:$src1, VTI.MemOp:$src2, i32u8imm:$src3), OpStr, 70 (VTI.VT (OpNode VTI.RC:$src1, (VTI.LdFrag addr:$src2), 74 defm rmbi : AVX512_maskable<0x52, MRMSrcMem, VTI, (outs VTI.RC:$dst), 75 (ins VTI.RC:$src1, VTI.ScalarMemOp:$src2, i32u8imm:$src3), [all …]
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| H A D | X86InstrAVX512.td | 12302 X86FoldableSchedWrite sched, X86VectorVTInfo VTI> { 12304 ExeDomain = VTI.ExeDomain in { 12305 defm r: AVX512_maskable_3src<Op, MRMSrcReg, VTI, (outs VTI.RC:$dst), 12306 (ins VTI.RC:$src2, VTI.RC:$src3), OpStr, 12308 (VTI.VT (OpNode VTI.RC:$src1, VTI.RC:$src2, VTI.RC:$src3))>, 12310 defm m: AVX512_maskable_3src<Op, MRMSrcMem, VTI, (outs VTI.RC:$dst), 12311 (ins VTI.RC:$src2, VTI.MemOp:$src3), OpStr, 12313 (VTI.VT (OpNode VTI.RC:$src1, VTI.RC:$src2, 12314 (VTI.VT (VTI.LdFrag addr:$src3))))>, 12321 X86FoldableSchedWrite sched, X86VectorVTInfo VTI> [all …]
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| /freebsd/contrib/file/magic/Magdir/ |
| H A D | ti-8x | 230 0 string VTI Virtual TI skin
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| /freebsd/contrib/llvm-project/clang/lib/AST/ |
| H A D | DeclBase.cpp | 707 VersionTuple VTI(A->getIntroduced()); in CheckAvailability() local 708 Out << "introduced in " << PrettyPlatformName << " " << VTI; in CheckAvailability()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 3518 const EVT VTI = promoteScalarIntegerPTX(VTs[I]); in LowerReturn() local 3520 ExtendIntegerRetVal ? MVT::i32 : (VTI == MVT::i1 ? MVT::i8 : VTI); in LowerReturn()
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| /freebsd/share/misc/ |
| H A D | pci_vendors | 26289 1bf4 VTI Instruments Corporation
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