Searched refs:VT64 (Results 1 – 3 of 3) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.td | 6866 Instruction SUBHN2, ValueType VT64, ValueType VT128, int Shift> { 6867 def : Pat<(VT64 (trunc (VT128 (AArch64vlshr (add V128:$Rn, V128:$Rm), (i32 Shift))))), 6870 def : Pat<(concat_vectors (VT64 V64:$Rd), 6875 def : Pat<(VT64 (trunc (VT128 (AArch64vlshr (sub V128:$Rn, V128:$Rm), (i32 Shift))))), 6878 def : Pat<(concat_vectors (VT64 V64:$Rd), 6884 def : Pat<(VT64 (trunc (VT128 (AArch64vlshr (xor V128:$Rn, immAllOnesV:$Rm), (i32 Shift))))), 6887 def : Pat<(concat_vectors (VT64 V64:$Rd), 6912 multiclass ExtPat<ValueType VT64, ValueType VT128, int N> { 6913 def : Pat<(VT64 (AArch64ext V64:$Rn, V64:$Rm, (i32 imm:$imm))), 6919 def : Pat<(VT64 (extract_subvector V128:$Rn, (i64 N))), [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrSSE.td | 5579 ValueType VT32, ValueType VT64, 5613 [(set VR128:$dst, (VT64 (OpNode VR128:$src1, VR128:$src2, timm:$src3)))]>,
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| H A D | X86ISelLowering.cpp | 29050 MVT VT64 = MVT::getVectorVT(MVT::i64, VT.getSizeInBits() / 64); in LowerVectorCTLZ_GFNI() local 29051 SDValue CTTZConst = DAG.getConstant(0xAACCF0FF00000000ULL, DL, VT64); in LowerVectorCTLZ_GFNI()
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