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Searched refs:VSrc (Results 1 – 4 of 4) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/IR/
H A DVerifier.cpp3540 auto *VSrc = cast<VectorType>(SrcTy); in visitPtrToIntInst() local
3542 Check(VSrc->getElementCount() == VDest->getElementCount(), in visitPtrToIntInst()
3560 auto *VSrc = cast<VectorType>(SrcTy); in visitIntToPtrInst() local
3562 Check(VSrc->getElementCount() == VDest->getElementCount(), in visitIntToPtrInst()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUInstructionSelector.cpp1927 Register VSrc = MI.getOperand(1).getReg(); in selectDSGWSIntrinsic() local
1928 MIB.addReg(VSrc); in selectDSGWSIntrinsic()
1930 if (!RBI.constrainGenericRegister(VSrc, AMDGPU::VGPR_32RegClass, *MRI)) in selectDSGWSIntrinsic()
H A DSIInstructions.td1248 RegOrImmOperand VSrc> {
1256 (V_CVT_I32_F32_e32 (cvt_f32_f16_inst_e64 SRCMODS.NONE, VSrc:$src))
1261 (V_CVT_U32_F32_e32 (cvt_f32_f16_inst_e64 SRCMODS.NONE, VSrc:$src))
H A DSIRegisterInfo.td1198 // This is for operands with the enum(9), VSrc encoding restriction,