Home
last modified time | relevance | path

Searched refs:VSRL (Results 1 – 9 of 9) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86IntrinsicsInfo.h425 X86_INTRINSIC_DATA(avx2_psrl_d, INTR_TYPE_2OP, X86ISD::VSRL, 0),
426 X86_INTRINSIC_DATA(avx2_psrl_q, INTR_TYPE_2OP, X86ISD::VSRL, 0),
427 X86_INTRINSIC_DATA(avx2_psrl_w, INTR_TYPE_2OP, X86ISD::VSRL, 0),
982 X86_INTRINSIC_DATA(avx512_psrl_d_512, INTR_TYPE_2OP, X86ISD::VSRL, 0),
983 X86_INTRINSIC_DATA(avx512_psrl_q_512, INTR_TYPE_2OP, X86ISD::VSRL, 0),
984 X86_INTRINSIC_DATA(avx512_psrl_w_512, INTR_TYPE_2OP, X86ISD::VSRL, 0),
1566 X86_INTRINSIC_DATA(sse2_psrl_d, INTR_TYPE_2OP, X86ISD::VSRL, 0),
1567 X86_INTRINSIC_DATA(sse2_psrl_q, INTR_TYPE_2OP, X86ISD::VSRL, 0),
1568 X86_INTRINSIC_DATA(sse2_psrl_w, INTR_TYPE_2OP, X86ISD::VSRL, 0),
H A DX86ISelLowering.h357 VSRL, enumerator
H A DX86InstrFragmentsSIMD.td235 def X86vsrl : SDNode<"X86ISD::VSRL", X86vshiftuniform>;
H A DX86ISelLowering.cpp25168 case X86ISD::VSRL: in getTargetVShiftUniformOpcode()
25170 return IsVariable ? X86ISD::VSRL : X86ISD::VSRLI; in getTargetVShiftUniformOpcode()
33795 NODE_NAME_CASE(VSRL) in getTargetNodeName()
41229 case X86ISD::VSRL: in combineTargetShuffle()
41961 case X86ISD::VSRL: in SimplifyDemandedVectorEltsForTargetNode()
41972 return (UseOpc == X86ISD::VSHL || UseOpc == X86ISD::VSRL || in SimplifyDemandedVectorEltsForTargetNode()
42451 case X86ISD::VSRL: in SimplifyDemandedVectorEltsForTargetNode()
48660 X86ISD::VSRL == N->getOpcode()) && in combineVectorShiftVar()
56439 case X86ISD::VSRL: in combineConcatVectorOps()
57852 case X86ISD::VSRL: in PerformDAGCombine()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCRegisterInfo.td88 // VSRL - One of the 32 128-bit VSX registers that overlap with the scalar
90 class VSRL<FPR SubReg, FPR SubRegH, string n> : PPCReg<n> {
197 def VSL#Index : VSRL<!cast<FPR>("F"#Index), !cast<FPR>("FH"#Index), "vs"#Index>,
212 … [!cast<VSRL>("VSL"#Index), !cast<VSRL>("VSL"#!add(Index, 1))]>,
/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVVPInstrPatternsVec.td385 i64, v256i64, "VSRL",
H A DVEInstrVec.td610 // e.g. VSLL, VSRL, VSLA, and etc.
1058 // Section 8.12.3 - VSRL (Vector Shift Right Logical)
1059 let cx = 0, cx2 = 0 in defm VSRL : RVSm<"vsrl", 0xf5, I64, V64, VM>;
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchLSXInstrInfo.td1464 // VSRL[I]_{B/H/W/D}
1465 defm : PatVrVr<srl, "VSRL">;
1466 defm : PatShiftVrVr<srl, "VSRL">;
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZInstrVector.td818 def VSRL : BinaryVRRc<"vsrl", 0xE77C, int_s390_vsrl, v128b, v128b>;
982 defm : FullVectorShiftOps<vshiftop<srl>, VSRL, VSRLB>;