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Searched refs:VSRL (Results 1 – 9 of 9) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86IntrinsicsInfo.h754 X86_INTRINSIC_DATA(avx2_psrl_d, INTR_TYPE_2OP, X86ISD::VSRL, 0),
755 X86_INTRINSIC_DATA(avx2_psrl_q, INTR_TYPE_2OP, X86ISD::VSRL, 0),
756 X86_INTRINSIC_DATA(avx2_psrl_w, INTR_TYPE_2OP, X86ISD::VSRL, 0),
1323 X86_INTRINSIC_DATA(avx512_psrl_d_512, INTR_TYPE_2OP, X86ISD::VSRL, 0),
1324 X86_INTRINSIC_DATA(avx512_psrl_q_512, INTR_TYPE_2OP, X86ISD::VSRL, 0),
1325 X86_INTRINSIC_DATA(avx512_psrl_w_512, INTR_TYPE_2OP, X86ISD::VSRL, 0),
1983 X86_INTRINSIC_DATA(sse2_psrl_d, INTR_TYPE_2OP, X86ISD::VSRL, 0),
1984 X86_INTRINSIC_DATA(sse2_psrl_q, INTR_TYPE_2OP, X86ISD::VSRL, 0),
1985 X86_INTRINSIC_DATA(sse2_psrl_w, INTR_TYPE_2OP, X86ISD::VSRL, 0),
H A DX86ISelLowering.h377 VSRL, enumerator
H A DX86InstrFragmentsSIMD.td254 def X86vsrl : SDNode<"X86ISD::VSRL", X86vshiftuniform>;
H A DX86ISelLowering.cpp26013 case X86ISD::VSRL: in getTargetVShiftUniformOpcode()
26015 return IsVariable ? X86ISD::VSRL : X86ISD::VSRLI; in getTargetVShiftUniformOpcode()
35070 NODE_NAME_CASE(VSRL) in getTargetNodeName()
42464 N0.getOpcode() == X86ISD::VSRL || N0.getOpcode() == X86ISD::VSRLI || in combineTargetShuffle()
42787 case X86ISD::VSRL: in combineTargetShuffle()
43547 case X86ISD::VSRL: in SimplifyDemandedVectorEltsForTargetNode()
43558 return (UseOpc == X86ISD::VSHL || UseOpc == X86ISD::VSRL || in SimplifyDemandedVectorEltsForTargetNode()
44061 case X86ISD::VSRL: in SimplifyDemandedVectorEltsForTargetNode()
50415 X86ISD::VSRL == N->getOpcode()) && in combineVectorShiftVar()
58772 case X86ISD::VSRL: in combineConcatVectorOps()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCRegisterInfo.td88 // VSRL - One of the 32 128-bit VSX registers that overlap with the scalar
90 class VSRL<FPR SubReg, FPR SubRegH, string n> : PPCReg<n> {
197 def VSL#Index : VSRL<!cast<FPR>("F"#Index), !cast<FPR>("FH"#Index), "vs"#Index>,
212 … [!cast<VSRL>("VSL"#Index), !cast<VSRL>("VSL"#!add(Index, 1))]>,
/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVVPInstrPatternsVec.td385 i64, v256i64, "VSRL",
H A DVEInstrVec.td610 // e.g. VSLL, VSRL, VSLA, and etc.
1058 // Section 8.12.3 - VSRL (Vector Shift Right Logical)
1059 let cx = 0, cx2 = 0 in defm VSRL : RVSm<"vsrl", 0xf5, I64, V64, VM>;
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchLSXInstrInfo.td1579 // VSRL[I]_{B/H/W/D}
1580 defm : PatVrVr<srl, "VSRL">;
1581 defm : PatShiftVrVr<srl, "VSRL">;
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZInstrVector.td996 def VSRL : BinaryVRRc<"vsrl", 0xE77C, int_s390_vsrl, v128b, v128b>;
1336 defm : FullVectorShiftOps<vshiftop<srl>, VSRL, VSRLB>;