Searched refs:VRegInfo (Results 1 – 8 of 8) sorted by relevance
39 struct VRegInfo { struct176 DenseMap<Register, VRegInfo *> VRegInfos;177 StringMap<VRegInfo *> VRegInfosNamed;190 VRegInfo &getVRegInfo(Register Num);191 VRegInfo &getVRegInfoNamed(StringRef RegName);235 VRegInfo *&Info, StringRef Src,
45 VRegInfos = std::unique_ptr<VRegInfo[]>(new VRegInfo[NumVirtRegs]); in DeadLaneDetector()122 DeadLaneDetector::VRegInfo &MORegInfo = VRegInfos[MORegIdx]; in addUsedLanesOnOperand()216 VRegInfo &RegInfo = VRegInfos[DefRegIdx]; in transferDefinedLanesStep()391 const DeadLaneDetector::VRegInfo &RegInfo) const;425 const MachineOperand &MO, const DeadLaneDetector::VRegInfo &RegInfo) const { in isUndefRegAtInput()447 const DeadLaneDetector::VRegInfo &DefRegInfo = DLD.getVRegInfo(DefRegIdx); in isUndefInput()467 VRegInfo &Info = VRegInfos[RegIdx]; in computeSubRegisterLaneBitInfo()477 VRegInfo &Info = VRegInfos[RegIdx]; in computeSubRegisterLaneBitInfo()493 const VRegInfo &Info = VRegInfos[RegIdx]; in computeSubRegisterLaneBitInfo()517 const DeadLaneDetector::VRegInfo &RegInfo = DLD.getVRegInfo(RegIdx); in modifySubRegisterOperandStatus()
49 VRegInfo.reserve(256); in MachineRegisterInfo()60 VRegInfo[Reg].first = RC; in setRegClass()65 VRegInfo[Reg].first = &RegBank; in setRegBank()147 VRegInfo.grow(Reg); in createIncompleteVirtualRegister()164 VRegInfo[Reg].first = RegClass; in createVirtualRegister()172 VRegInfo[Reg].first = RegAttr.RCOrRB; in createVirtualRegister()181 VRegInfo[Reg].first = VRegInfo[VReg].first; in cloneVirtualRegister()197 VRegInfo[Reg].first = static_cast<RegisterBank *>(nullptr); in createGenericVirtualRegister()210 if (!VRegInfo[Reg].second) in clearVirtRegs()220 VRegInfo.clear(); in clearVirtRegs()
152 DeadLaneDetector::VRegInfo Info = DLD.getVRegInfo(Reg.virtRegIndex()); in handleSubReg()
48 struct VRegInfo { struct59 const VRegInfo &getVRegInfo(unsigned RegIdx) const { in getVRegInfo() argument110 std::unique_ptr<VRegInfo[]> VRegInfos;
81 VRegInfo; variable118 return VRegInfo[RegNo.id()].second; in getRegUseDefListHead()124 return VRegInfo[RegNo.id()].second; in getRegUseDefListHead()646 assert(isa<const TargetRegisterClass *>(VRegInfo[Reg.id()].first) && in getRegClass()648 return cast<const TargetRegisterClass *>(VRegInfo[Reg.id()].first); in getRegClass()663 const RegClassOrRegBank &Val = VRegInfo[Reg].first; in getRegClassOrNull()670 return cast<const RegisterBank *>(VRegInfo[Reg.id()].first); in getRegBank()678 const RegClassOrRegBank &Val = VRegInfo[Reg].first; in getRegBankOrNull()686 return VRegInfo[Reg].first; in getRegClassOrRegBank()697 VRegInfo[Reg].first = RCOrRB; in setRegClassOrRegBank()[all …]
328 VRegInfo &PerFunctionMIParsingState::getVRegInfo(Register Num) { in getVRegInfo()332 VRegInfo *Info = new (Allocator) VRegInfo; in getVRegInfo()339 VRegInfo &PerFunctionMIParsingState::getVRegInfoNamed(StringRef RegName) { in getVRegInfoNamed()344 VRegInfo *Info = new (Allocator) VRegInfo; in getVRegInfoNamed()435 bool parseStandaloneVirtualRegister(VRegInfo *&Info);452 bool parseVirtualRegister(VRegInfo *&Info);453 bool parseNamedVirtualRegister(VRegInfo *&Info);454 bool parseRegister(Register &Reg, VRegInfo *&VRegInfo);456 bool parseRegisterClassOrBank(VRegInfo &RegInfo);1229 bool MIParser::parseStandaloneVirtualRegister(VRegInfo *&Info) { in parseStandaloneVirtualRegister()[all …]
680 VRegInfo &Info = PFS.getVRegInfo(VReg.ID.Value); in parseRegisterInfo()688 Info.Kind = VRegInfo::GENERIC; in parseRegisterInfo()693 Info.Kind = VRegInfo::NORMAL; in parseRegisterInfo()702 Info.Kind = VRegInfo::REGBANK; in parseRegisterInfo()708 if (Info.Kind != VRegInfo::NORMAL) in parseRegisterInfo()735 VRegInfo *Info; in parseRegisterInfo()769 auto populateVRegInfo = [&](const VRegInfo &Info, const Twine &Name) { in setupRegisterInfo()772 case VRegInfo::UNKNOWN: in setupRegisterInfo()778 case VRegInfo::NORMAL: in setupRegisterInfo()792 case VRegInfo::GENERIC: in setupRegisterInfo()[all …]