Searched refs:VReg2 (Results 1 – 3 of 3) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMInstructionSelector.cpp | 252 Register VReg2 = MIB.getReg(2); in selectMergeValues() local
253 (void)VReg2; in selectMergeValues()
254 assert(MRI.getType(VReg2).getSizeInBits() == 32 && in selectMergeValues()
255 RBI.getRegBank(VReg2, MRI, TRI)->getID() == ARM::GPRRegBankID && in selectMergeValues()
284 Register VReg2 = MIB.getReg(2); in selectUnmergeValues() local
285 (void)VReg2; in selectUnmergeValues()
286 assert(MRI.getType(VReg2).getSizeInBits() == 64 && in selectUnmergeValues()
287 RBI.getRegBank(VReg2, MRI, TRI)->getID() == ARM::FPRRegBankID && in selectUnmergeValues()
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| H A D | ARMISelLowering.cpp | 11112 unsigned VReg2 = VReg1; in EmitSjLjDispatchBlock() local
11114 VReg2 = MRI->createVirtualRegister(TRC); in EmitSjLjDispatchBlock()
11115 BuildMI(DispatchBB, dl, TII->get(ARM::t2MOVTi16), VReg2) in EmitSjLjDispatchBlock()
11123 .addReg(VReg2) in EmitSjLjDispatchBlock()
11249 unsigned VReg2 = VReg1; in EmitSjLjDispatchBlock() local
11251 VReg2 = MRI->createVirtualRegister(TRC); in EmitSjLjDispatchBlock()
11252 BuildMI(DispatchBB, dl, TII->get(ARM::MOVTi16), VReg2) in EmitSjLjDispatchBlock()
11260 .addReg(VReg2) in EmitSjLjDispatchBlock()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 695 Register VReg2 = MRI->createVirtualRegister(RC); in generateLoadForNewConst() local
702 BuildMI(*MF, MI->getDebugLoc(), get(LoadOpcode), VReg2) in generateLoadForNewConst()
712 return VReg2; in generateLoadForNewConst()
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