Searched refs:VReg0 (Results 1 – 1 of 1) sorted by relevance
242 Register VReg0 = MIB.getReg(0); in selectMergeValues() local243 (void)VReg0; in selectMergeValues()244 assert(MRI.getType(VReg0).getSizeInBits() == 64 && in selectMergeValues()245 RBI.getRegBank(VReg0, MRI, TRI)->getID() == ARM::FPRRegBankID && in selectMergeValues()274 Register VReg0 = MIB.getReg(0); in selectUnmergeValues() local275 (void)VReg0; in selectUnmergeValues()276 assert(MRI.getType(VReg0).getSizeInBits() == 32 && in selectUnmergeValues()277 RBI.getRegBank(VReg0, MRI, TRI)->getID() == ARM::GPRRegBankID && in selectUnmergeValues()