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Searched refs:VREV32 (Results 1 – 6 of 6) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.h205 VREV32, // reverse elements within 32-bit words enumerator
H A DARMScheduleSwift.td565 (instregex "VEXT", "VREV16", "VREV32", "VREV64")>;
H A DARMISelLowering.cpp1795 MAKE_CASE(ARMISD::VREV32) in getTargetNodeName()
8504 return DAG.getNode(ARMISD::VREV32, dl, VT, OpLHS); in GeneratePerfectShuffle()
8873 return DAG.getNode(ARMISD::VREV32, dl, VT, V1); in LowerVECTOR_SHUFFLE()
10322 unsigned RevOpcode = NumActiveLanes == 16 ? ARMISD::VREV16 : ARMISD::VREV32; in LowerVecReduce()
18805 unsigned Rev = VT == MVT::v4i32 ? ARMISD::VREV32 : ARMISD::VREV16; in PerformMVEExtCombine()
H A DARMInstrInfo.td269 def ARMvrev32 : SDNode<"ARMISD::VREV32", SDTARMVSHUF>;
H A DARMInstrNEON.td6999 // VREV32 : Vector Reverse elements within 32-bit words
/freebsd/contrib/llvm-project/clang/include/clang/Basic/
H A Darm_neon.td638 def VREV32 : WOpInst<"vrev32", "..", "csUcUsPcPsQcQsQUcQUsQPcQPs", OP_REV32>;