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Searched refs:VOPC (Results 1 – 11 of 11) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DVOPCInstructions.td44 // VOPC classes
47 // VOPC instructions are a special case because for the 32-bit
62 // VOPC DPP Instructions do not need an old operand
76 // VOPC disallows dst_sel and dst_unused as they have no effect on destination
152 let VOPC = 1;
164 let VOPC = 1;
190 // This class is used only with VOPC instructions. Use $sdst for out operand
319 let VOPC = 1;
381 let VOPC = 1;
878 let VOPC = 1;
[all …]
H A DSIInstrFormats.td30 field bit VOPC = 0;
170 let TSFlags{9} = VOPC;
259 let hasExtraSrcRegAllocReq = !or(VOP1, VOP2, VOP3, VOPC, SDWA, VALU);
H A DSIInstrInfo.td1537 SDWAVopcDst, // VOPC
1965 (outs), // no dst for VOPC, we use "vcc"-token as dst in SDWA VOPC instructions
1982 string dst = !if(!eq(DstVT.Size, 1), "$sdst", "$vdst"); // use $sdst for VOPC
2055 ""); // use $sdst for VOPC
2084 ""); // use $sdst for VOPC
2129 " vcc", // use vcc token as dst for VOPC instructions
2146 " $src0_sel $src1_sel", // No dst_sel and dst_unused for VOPC
2158 "$sdst", // VOPC
2174 … " $src0_sel $src1_sel", // No dst_sel, dst_unused and output modifiers for VOPC
H A DSIDefines.h68 VOPC = 1 << 9, enumerator
H A DSIInstrInfo.h521 return MI.getDesc().TSFlags & SIInstrFlags::VOPC; in isVOPC()
525 return get(Opcode).TSFlags & SIInstrFlags::VOPC; in isVOPC()
H A DSISchedule.td75 // instructions and have VALU rates, but write to the SALU (i.e. VOPC
H A DAMDGPU.td480 "Support scalar dst for VOPC with SDWA (Sub-DWORD Addressing) extension"
492 "Support clamp for VOPC with SDWA (Sub-DWORD Addressing) extension"
H A DVOPInstructions.td540 // 2. Add a new version of the SDWA microcode word for VOPC: SDWAB. This
1702 def VOPCAsmOnlyInfoTable : AsmOnlyInfoTable <"VOPC", "VOPC_DPPe_Common">;
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DAMDGPUInstPrinter.cpp765 (Desc.TSFlags & SIInstrFlags::VOPC) && in needsImpliedVcc()
783 (Desc.TSFlags & SIInstrFlags::VOPC) && !isVOPCAsmOnly(Desc.getOpcode()) && in printOperand()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/
H A DAMDGPUAsmParser.cpp3719 (SIInstrFlags::VOPC | SIInstrFlags::VOP1 | SIInstrFlags::VOP2 | in validateConstantBusLimitations()
4345 const auto Enc = VOP1 | VOP2 | VOP3 | VOPC | VOP3P | SIInstrFlags::SDWA; in validateLdsDirect()
9443 cvtSDWA(Inst, Operands, SIInstrFlags::VOPC, isVI()); in cvtSdwaVOPC()
9477 if (BasicInstType == SIInstrFlags::VOPC && Inst.getNumOperands() == 0) { in cvtSDWA()
9532 case SIInstrFlags::VOPC: in cvtSDWA()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/
H A DAMDGPUDisassembler.cpp621 else if ((MCII->get(MI.getOpcode()).TSFlags & SIInstrFlags::VOPC) || in getInstruction()