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Searched refs:VOP3 (Results 1 – 19 of 19) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DVOPInstructions.td81 // Using complex patterns gives VOP3 patterns a very high complexity rating,
87 let VOP3 = 1;
89 let AsmVariantName = AMDGPUAsmVariants.VOP3;
130 // Using complex patterns gives VOP3 patterns a very high complexity rating,
136 let VOP3 = 1;
148 let AsmVariantName = AMDGPUAsmVariants.VOP3;
176 let VOP3 = 1;
209 // XXX - Is there any reason to distinguish this from regular VOP3
852 let VOP3 = 1;
928 let VOP3 = 1;
[all …]
H A DSIInstrFormats.td31 field bit VOP3 = 0;
80 // This bit indicates that this is a VOP3 opcode which supports op_sel
171 let TSFlags{10} = VOP3;
259 let hasExtraSrcRegAllocReq = !or(VOP1, VOP2, VOP3, VOPC, SDWA, VALU);
H A DSIDefines.h71 VOP3 = 1 << 10, enumerator
336 VOP3 = 1, enumerator
H A DSIInstrInfo.td1387 // VOP3 modifiers used for instructions that do not read canonicalized
1508 3))); // VOP3
1589 // Returns the register class to use for sources of VOP3 instructions for the
1612 // Src2 of VOP3 DPP instructions cannot be a literal
1709 // Returns the input arguments for VOP3 instructions for the given SrcVT.
1755 // VOP3 with modifiers
1769 // VOP3 with modifiers except src2
1782 // VOP3 without modifiers
1850 /* NumSrcArgs == 3, VOP3 */,
2202 0, // NumSrcArgs == 3 - No SDWA for VOP3
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H A DVINTERPInstructions.td51 // VOP3 VINTERP
H A DVOP2Instructions.td630 // Select FP modifiers for VOP3
929 // FIXME VOP3 Only instructions. NFC using VOPProfile_True16 for these until a planned change to us…
1715 // VOP3 only.
2032 // VOP3 only.
2043 // VOP3 carry-out.
2437 // are VOP2 on SI and VOP3 on VI.
2445 let AsmVariantName = AMDGPUAsmVariants.VOP3;
H A DAMDGPU.td890 "Can use one literal in VOP3"
1701 string VOP3 = "VOP3";
1722 let Name = AMDGPUAsmVariants.VOP3;
H A DSIInstrInfo.h505 return MI.getDesc().TSFlags & SIInstrFlags::VOP3; in isVOP3()
509 return get(Opcode).TSFlags & SIInstrFlags::VOP3; in isVOP3()
H A DVOPCInstructions.td1347 // Encoding used for VOPC instructions encoded as VOP3 differs from
1414 // Encoding used for VOPC instructions encoded as VOP3 differs from
1804 // Encoding used for VOPC instructions encoded as VOP3 differs from
1917 // Encoding used for VOPC instructions encoded as VOP3 differs from
2155 // Encoding used for VOPC instructions encoded as VOP3
H A DVOP1Instructions.td250 // TODO: There is VOP3 encoding also
640 // Similar to VOPProfile_Base_CVT_F32_F8, but for VOP3 instructions.
938 // VOP3 using the OpSel profile for the pseudo instruction.
H A DSIRegisterInfo.td594 // VOP3 and VINTERP can access 256 lo and 256 hi registers.
1168 // The current and temporary future default used case for VOP3.
1173 // True16 VOP3 operands.
H A DVOP3Instructions.td54 // VOP3 INTERP
123 // VOP3 Instructions
H A DSOPInstructions.td781 // TODO: b64 versions require VOP3 change since v_lshlrev_b64 is VOP3
H A DVOP3PInstructions.td73 // VOP3 neg/abs and VOP3P opsel/opsel_hi modifiers are allowed.
H A DSIInstructions.td2288 // VOP3 Patterns
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DAMDGPUMCCodeEmitter.cpp358 return (Desc.TSFlags & SIInstrFlags::VOP3) && in isVCMPX64()
H A DAMDGPUInstPrinter.cpp390 if (Flags & SIInstrFlags::VOP3 && Flags & SIInstrFlags::DPP) in printVOPDst()
392 else if (Flags & SIInstrFlags::VOP3) { in printVOPDst()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/
H A DAMDGPUAsmParser.cpp3461 if ((getForcedEncodingSize() == 32 && (TSFlags & SIInstrFlags::VOP3)) || in checkTargetMatchPredicate()
3462 (getForcedEncodingSize() == 64 && !(TSFlags & SIInstrFlags::VOP3)) || in checkTargetMatchPredicate()
3483 AMDGPUAsmVariants::DEFAULT, AMDGPUAsmVariants::VOP3, in getAllVariants()
3503 static const unsigned Variants[] = {AMDGPUAsmVariants::VOP3}; in getMatchedVariants()
3720 SIInstrFlags::VOP3 | SIInstrFlags::VOP3P | SIInstrFlags::SDWA)) && in validateConstantBusLimitations()
4345 const auto Enc = VOP1 | VOP2 | VOP3 | VOPC | VOP3P | SIInstrFlags::SDWA; in validateLdsDirect()
4552 (TSFlags & SIInstrFlags::VOP3) && !(TSFlags & SIInstrFlags::VOP3P)) { in validateOpSel()
4655 if (!(Desc.TSFlags & (SIInstrFlags::VOP3 | SIInstrFlags::VOP3P)) && in validateVOPLiteral()
9276 else if (Desc.TSFlags & SIInstrFlags::VOP3) in cvtVOP3DPP()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/
H A DAMDGPUDisassembler.cpp627 else if (MCII->get(MI.getOpcode()).TSFlags & SIInstrFlags::VOP3) in getInstruction()