Searched refs:VOP1 (Results 1 – 10 of 10) sorted by relevance
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIInstrFormats.td | 28 field bit VOP1 = 0; 168 let TSFlags{7} = VOP1; 259 let hasExtraSrcRegAllocReq = !or(VOP1, VOP2, VOP3, VOPC, SDWA, VALU);
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H A D | VOP1Instructions.td | 11 // VOP1 Classes 56 let VOP1 = 1; 69 let VOP1 = 1; 224 // VOP1 Instructions 937 // Define VOP1 instructions using the pseudo instruction with its old profile and 1341 let VOP1 = 1, SubtargetPredicate = isGFX8GFX9, Uses = [EXEC, M0], Size = V_MOV_B32_e32.Size in { 1359 } // End VOP1 = 1, SubtargetPredicate = isGFX8GFX9, Uses = [M0]
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H A D | SIInstrInfo.td | 1506 !if (!eq(Src1.Value, untyped.Value), 1, // VOP1 1538 VOPDstOperand<VGPR_32>); // VOP1/2 32-bit dst 1704 dag ret = !if(!eq(NumSrcArgs, 1), (ins Src0RC:$src0), // VOP1 1717 // VOP1 without input operands (V_NOP, V_CLREXCP) 1722 // VOP1 with modifiers 1730 // VOP1 without modifiers 1829 // VOP1 without input operands (V_NOP) 1923 // VOP1 without input operands (V_NOP) 1926 // VOP1 2159 "$vdst"), // VOP1/2
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H A D | SIDefines.h | 66 VOP1 = 1 << 7, enumerator
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H A D | SIRegisterInfo.td | 606 // VOP1/2/C can access the First 128 lo and 128 hi registers. 1187 // True16 VOP1/2/C operands. 1201 // The current and temporary future default used case for fake VOP1/2/C. 1202 // For VOP1,2,C True16 instructions. _Lo128 use first 128 32-bit VGPRs only.
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H A D | SIInstrInfo.h | 489 return MI.getDesc().TSFlags & SIInstrFlags::VOP1; in isVOP1() 493 return get(Opcode).TSFlags & SIInstrFlags::VOP1; in isVOP1()
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H A D | VOPInstructions.td | 1209 // In VOP1, we can have clamp and omod even if !HasModifiers 1541 // VOP1 and VOP2 depend on these triple defs 1676 def VOP1InfoTable : VOPInfoTable<"VOP1">;
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H A D | SIInstructions.td | 805 let VOP1 = 1; 1104 // VOP1 Patterns
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
H A D | AMDGPUInstPrinter.cpp | 399 else if (((Flags & SIInstrFlags::VOP1) && !getVOP1IsSingle(Opcode)) || in printVOPDst()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/ |
H A D | AMDGPUAsmParser.cpp | 3719 (SIInstrFlags::VOPC | SIInstrFlags::VOP1 | SIInstrFlags::VOP2 | in validateConstantBusLimitations() 4345 const auto Enc = VOP1 | VOP2 | VOP3 | VOPC | VOP3P | SIInstrFlags::SDWA; in validateLdsDirect() 9427 cvtSDWA(Inst, Operands, SIInstrFlags::VOP1); in cvtSdwaVOP1() 9498 case SIInstrFlags::VOP1: in cvtSDWA()
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