Searched refs:VMLALVu (Results 1 – 3 of 3) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.h | 251 VMLALVu, // high 32-bit halves of the sum enumerator
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| H A D | ARMISelLowering.cpp | 1822 MAKE_CASE(ARMISD::VMLALVu) in getTargetNodeName()
13849 if (SDValue M = MakeVecReduce(ARMISD::VMLALVu, ARMISD::VMLALVAu, N0, N1)) in PerformADDVecReduce()
13853 if (SDValue M = MakeVecReduce(ARMISD::VMLALVu, ARMISD::VMLALVAu, N1, N0)) in PerformADDVecReduce()
17311 assert((Opcode == ARMISD::VMLALVs || Opcode == ARMISD::VMLALVu) && in PerformVECREDUCE_ADDCombine()
17313 bool IsUnsigned = Opcode == ARMISD::VMLALVu; in PerformVECREDUCE_ADDCombine()
17346 return Create64bitNode(ARMISD::VMLALVu, {A, B}); in PerformVECREDUCE_ADDCombine()
19054 case ARMISD::VMLALVu: in PerformDAGCombine()
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| H A D | ARMInstrMVE.td | 1151 def ARMVMLALVu : SDNode<"ARMISD::VMLALVu", SDTVecReduce2L>;
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