Searched refs:VLD2DUP (Results 1 – 4 of 4) sorted by relevance
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 325 VLD2DUP, enumerator
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H A D | ARMInstrNEON.td | 1467 // VLD2DUP : Vector Load (single 2-element structure to all lanes) 1468 class VLD2DUP<bits<4> op7_4, string Dt, RegisterOperand VdTy, Operand AddrMode> 1477 def VLD2DUPd8 : VLD2DUP<{0,0,0,?}, "8", VecListDPairAllLanes, 1479 def VLD2DUPd16 : VLD2DUP<{0,1,0,?}, "16", VecListDPairAllLanes, 1481 def VLD2DUPd32 : VLD2DUP<{1,0,0,?}, "32", VecListDPairAllLanes, 1487 def VLD2DUPd8x2 : VLD2DUP<{0,0,1,?}, "8", VecListDPairSpacedAllLanes, 1489 def VLD2DUPd16x2 : VLD2DUP<{0,1,1,?}, "16", VecListDPairSpacedAllLanes, 1491 def VLD2DUPd32x2 : VLD2DUP<{1,0,1,?}, "32", VecListDPairSpacedAllLanes,
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H A D | ARMISelLowering.cpp | 1869 MAKE_CASE(ARMISD::VLD2DUP) in getTargetNodeName() 15933 case ARMISD::VLD2DUP: in TryCombineBaseUpdate() 16393 NewOpc = ARMISD::VLD2DUP; in CombineVLDDUP() 18953 case ARMISD::VLD2DUP: in PerformDAGCombine()
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H A D | ARMISelDAGToDAG.cpp | 4334 case ARMISD::VLD2DUP: { in Select()
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