Searched refs:VK1 (Results 1 – 6 of 6) sorted by relevance
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86InstrVecCompiler.td | 195 def maskzeroupperv1i1 : maskzeroupper<v1i1, VK1>; 208 (COPY_TO_REGCLASS VK1:$src, VK32)>; 218 (COPY_TO_REGCLASS VK1:$src, VK64)>; 233 (COPY_TO_REGCLASS VK1:$src, VK16)>; 242 (COPY_TO_REGCLASS VK1:$src, VK8)>; 282 (v1i1 VK1:$mask), (iPTR 0))), 283 (KSHIFTRWri (KSHIFTLWri (COPY_TO_REGCLASS VK1:$mask, VK16), 310 (v1i1 VK1:$mask), (iPTR 0))), 311 (KSHIFTRBri (KSHIFTLBri (COPY_TO_REGCLASS VK1:$mask, VK8), 360 (v1i1 VK1 [all...] |
H A D | X86RegisterInfo.td | 812 def VK1 : RegisterClass<"X86", [v1i1], 16, (sequence "K%u", 0, 7)> {let Size = 16;} 813 def VK2 : RegisterClass<"X86", [v2i1], 16, (add VK1)> {let Size = 16;} 826 def VK1WM : RegisterClass<"X86", [v1i1], 16, (sub VK1, K0)> {let Size = 16;}
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H A D | X86InstrAVX512.td | 2730 (COPY_TO_REGCLASS (KMOVBkm addr:$src), VK1)>; 2764 defm : operation_gpr_mask_copy_lowering<VK1, v1i1>; 2816 def : Pat<(vnot VK1:$src), 2817 (COPY_TO_REGCLASS (KNOTWrr (COPY_TO_REGCLASS VK1:$src, VK16)), VK2)>; 2866 def : Pat<(VOpNode VK1:$src1, VK1:$src2), 2868 (COPY_TO_REGCLASS VK1:$src1, VK16), 2869 (COPY_TO_REGCLASS VK1:$src2, VK16)), VK1)>; 3151 def : Pat<(v1i1 immAllZerosV), (COPY_TO_REGCLASS (KSET0W), VK1)>; 3155 def : Pat<(v1i1 immAllOnesV), (COPY_TO_REGCLASS (KSET1W), VK1)>; 3167 defm : operation_subvector_mask_lowering<VK1, v1i1, VK2, v2i1>; [all …]
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H A D | X86FastISel.cpp | 2201 const TargetRegisterClass *VK1 = &X86::VK1RegClass; in X86FastEmitSSESelect() local 2205 Register CmpReg = fastEmitInst_rri(CmpOpcode, VK1, CmpLHSReg, CmpRHSReg, in X86FastEmitSSESelect()
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H A D | X86InstrUtils.td | 379 def v1i1_info : X86KVectorVTInfo<VK1, VK1WM, v1i1>;
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H A D | X86InstrCompiler.td | 605 defm _VK1 : CMOVrr_PSEUDO<VK1, v1i1>;
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