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Searched refs:VINTERP (Results 1 – 6 of 6) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DVINTERPInstructions.td1 //===-- VINTERPInstructions.td - VINTERP Instruction Definitions ----------===//
10 // VINTERP encoding
25 let Inst{25-24} = 0x1; // VINTERP sub-encoding
52 // VOP3 VINTERP
61 let VINTERP = 1;
66 let VINTERP = 1;
120 // VINTERP Pseudo Instructions
237 // VINTERP Real Instructions
H A DSIInstrFormats.td55 // VINTERP instruction format.
56 field bit VINTERP = 0;
199 let TSFlags{29} = VINTERP;
H A DSIDefines.h99 VINTERP = 1 << 29, enumerator
H A DSIInstrInfo.h879 return MI.getDesc().TSFlags & SIInstrFlags::VINTERP; in isVINTERP()
883 return get(Opcode).TSFlags & SIInstrFlags::VINTERP; in isVINTERP()
H A DSIRegisterInfo.td574 // VOP3 and VINTERP can access 256 lo and 256 hi registers.
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/
H A DAMDGPUDisassembler.cpp871 if (MCII->get(MI.getOpcode()).TSFlags & SIInstrFlags::VINTERP) in getInstruction()