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Searched refs:VFCVT_RM_XU_F_VL (Results 1 – 3 of 3) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.h301 VFCVT_RM_XU_F_VL, // Has a rounding mode operand. enumerator
H A DRISCVInstrInfoVVLPatterns.td278 def riscv_vfcvt_rm_xu_f_vl : SDNode<"RISCVISD::VFCVT_RM_XU_F_VL", SDT_RISCVFP2IOp_RM_VL>;
H A DRISCVISelLowering.cpp15352 IsSigned ? RISCVISD::VFCVT_RM_X_F_VL : RISCVISD::VFCVT_RM_XU_F_VL; in performFP_TO_INTCombine()
20533 NODE_NAME_CASE(VFCVT_RM_XU_F_VL) in getTargetNodeName()