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Searched refs:VEX_LIG (Results 1 – 5 of 5) sorted by relevance

/freebsd/contrib/llvm-project/llvm/utils/TableGen/
H A DX86DisassemblerTables.cpp88 bool VEX_LIG = false, bool WIG = false, in inheritsFrom() argument
157 return (VEX_LIG && WIG && inheritsFrom(child, IC_VEX_L_W)) || in inheritsFrom()
159 (VEX_LIG && inheritsFrom(child, IC_VEX_L)); in inheritsFrom()
161 return (VEX_LIG && WIG && inheritsFrom(child, IC_VEX_L_W_XS)) || in inheritsFrom()
163 (VEX_LIG && inheritsFrom(child, IC_VEX_L_XS)); in inheritsFrom()
165 return (VEX_LIG && WIG && inheritsFrom(child, IC_VEX_L_W_XD)) || in inheritsFrom()
167 (VEX_LIG && inheritsFrom(child, IC_VEX_L_XD)); in inheritsFrom()
169 return (VEX_LIG && WIG && inheritsFrom(child, IC_VEX_L_W_OPSIZE)) || in inheritsFrom()
171 (VEX_LIG && inheritsFrom(child, IC_VEX_L_OPSIZE)); in inheritsFrom()
173 return VEX_LIG && inheritsFrom(child, IC_VEX_L_W); in inheritsFrom()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrFMA.td323 SchedWriteFMA.Scl>, VEX_LIG;
325 SchedWriteFMA.Scl>, VEX_LIG;
328 SchedWriteFMA.Scl>, VEX_LIG;
330 SchedWriteFMA.Scl>, VEX_LIG;
399 (OpVT (OpNode RC:$src1, RC:$src2, RC:$src3)))]>, REX_W, VEX_LIG,
406 (mem_frag addr:$src3)))]>, REX_W, VEX_LIG,
413 (OpNode RC:$src1, (mem_frag addr:$src2), RC:$src3))]>, VEX_LIG,
426 VEX_LIG, Sched<[sched]>;
437 []>, REX_W, VEX_LIG, Sched<[sched]>;
443 []>, REX_W, VEX_LIG,
[all …]
H A DX86InstrAVX512.td1947 EVEX, VVVV, VEX_LIG, Sched<[sched]>, SIMD_EXC;
1957 … timm:$cc)>, EVEX, VVVV, VEX_LIG, EVEX_CD8<_.EltSize, CD8VT1>,
1970 EVEX, VVVV, VEX_LIG, EVEX_B, Sched<[sched]>;
1981 EVEX, VVVV, VEX_LIG, Sched<[sched]>, SIMD_EXC;
1990 EVEX, VVVV, VEX_LIG, EVEX_CD8<_.EltSize, CD8VT1>,
2602 sched.Scl, f32x_info, HasDQI>, VEX_LIG,
2605 sched.Scl, f64x_info, HasDQI>, VEX_LIG,
3961 VEX_LIG, TB, XS, EVEX_CD8<32, CD8VT1>;
3964 VEX_LIG, TB, XD, REX_W, EVEX_CD8<64, CD8VT1>;
3968 VEX_LIG, T_MAP5, XS, EVEX_CD8<16, CD8VT1>;
[all …]
H A DX86InstrSSE.td218 VEX, VVVV, VEX_LIG, WIG;
223 VEX, VEX_LIG, Sched<[WriteFStore]>, WIG;
251 VEX, VEX_LIG, Sched<[WriteFLoad]>, WIG;
262 VEX, VEX_LIG, Sched<[WriteFLoad]>, WIG;
906 TB, XS, VEX, VEX_LIG;
910 TB, XS, VEX, REX_W, VEX_LIG;
914 TB, XD, VEX, VEX_LIG;
918 TB, XD, VEX, REX_W, VEX_LIG;
923 TB, XS, VEX, VEX_LIG;
927 TB, XS, VEX, REX_W, VEX_LIG;
[all …]
H A DX86InstrUtils.td47 class VEX_LIG { bit ignoresVEX_L = 1; }