Searched refs:VECREDUCE_SEQ_FADD (Results 1 – 11 of 11) sorted by relevance
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | ISDOpcodes.h | 1380 VECREDUCE_SEQ_FADD, enumerator
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAGDumper.cpp | 530 case ISD::VECREDUCE_SEQ_FADD: return "vecreduce_seq_fadd"; in getOperationName()
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H A D | LegalizeVectorOps.cpp | 498 case ISD::VECREDUCE_SEQ_FADD: in LegalizeOp() 1109 case ISD::VECREDUCE_SEQ_FADD: in Expand()
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H A D | LegalizeFloatTypes.cpp | 168 case ISD::VECREDUCE_SEQ_FADD: in SoftenFloatResult() 2669 case ISD::VECREDUCE_SEQ_FADD: in PromoteFloatResult() 3105 case ISD::VECREDUCE_SEQ_FADD: in SoftPromoteHalfResult()
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H A D | LegalizeVectorTypes.cpp | 811 case ISD::VECREDUCE_SEQ_FADD: in ScalarizeVectorOperand() 3240 case ISD::VECREDUCE_SEQ_FADD: in SplitVectorOperand() 6451 case ISD::VECREDUCE_SEQ_FADD: in WidenVectorOperand()
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H A D | LegalizeDAG.cpp | 1217 case ISD::VECREDUCE_SEQ_FADD: in LegalizeOp()
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H A D | SelectionDAGBuilder.cpp | 10722 Res = DAG.getNode(ISD::VECREDUCE_SEQ_FADD, dl, VT, Op1, Op2, SDFlags); in visitVectorReduce()
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H A D | SelectionDAG.cpp | 430 case ISD::VECREDUCE_SEQ_FADD: in getVecReduceBaseOpcode()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | TargetLoweringBase.cpp | 790 ISD::VECREDUCE_SEQ_FADD, ISD::VECREDUCE_SEQ_FMUL}, in initActions()
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.cpp | 727 ISD::VECREDUCE_FADD, ISD::VECREDUCE_SEQ_FADD, ISD::VECREDUCE_FMIN, in RISCVTargetLowering() 6788 case ISD::VECREDUCE_SEQ_FADD: in LowerOperation() 9899 case ISD::VECREDUCE_SEQ_FADD: in getRVVFPReductionOpAndOperands()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 1775 setOperationAction(ISD::VECREDUCE_SEQ_FADD, VT, Custom); in AArch64TargetLowering() 2114 setOperationAction(ISD::VECREDUCE_SEQ_FADD, VT, PreferSVE ? Default : Expand); in addTypeForFixedLengthSVE() 6950 case ISD::VECREDUCE_SEQ_FADD: in LowerOperation()
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