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Searched refs:VECREDUCE_MUL (Results 1 – 12 of 12) sorted by relevance

/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h1406 VECREDUCE_MUL, enumerator
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp534 case ISD::VECREDUCE_MUL: return "vecreduce_mul"; in getOperationName()
H A DLegalizeVectorOps.cpp481 case ISD::VECREDUCE_MUL: in LegalizeOp()
1093 case ISD::VECREDUCE_MUL: in Expand()
H A DLegalizeIntegerTypes.cpp283 case ISD::VECREDUCE_MUL: in PromoteIntegerResult()
2001 case ISD::VECREDUCE_MUL: in PromoteIntegerOperand()
2565 case ISD::VECREDUCE_MUL: in getExtendForIntVecReduction()
2925 case ISD::VECREDUCE_MUL: in ExpandIntegerResult()
H A DLegalizeVectorTypes.cpp797 case ISD::VECREDUCE_MUL: in ScalarizeVectorOperand()
3226 case ISD::VECREDUCE_MUL: in SplitVectorOperand()
6437 case ISD::VECREDUCE_MUL: in WidenVectorOperand()
H A DLegalizeDAG.cpp1201 case ISD::VECREDUCE_MUL: in LegalizeOp()
4307 case ISD::VECREDUCE_MUL: in ExpandNode()
H A DSelectionDAGBuilder.cpp10736 Res = DAG.getNode(ISD::VECREDUCE_MUL, dl, VT, Op1); in visitVectorReduce()
H A DSelectionDAG.cpp442 case ISD::VECREDUCE_MUL: in getVecReduceBaseOpcode()
H A DDAGCombiner.cpp1978 case ISD::VECREDUCE_MUL: in visit()
4561 reassociateReduction(ISD::VECREDUCE_MUL, ISD::MUL, DL, VT, N0, N1)) in visitMUL()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp786 ISD::VECREDUCE_MUL, ISD::VECREDUCE_AND, ISD::VECREDUCE_OR, in initActions()
/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEISelLowering.cpp350 ISD::VECREDUCE_ADD, ISD::VECREDUCE_MUL, ISD::VECREDUCE_AND, in initVPUActions()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp310 setOperationAction(ISD::VECREDUCE_MUL, VT, Custom); in addMVEVectorTypes()
10301 case ISD::VECREDUCE_MUL: BaseOpcode = ISD::MUL; break; in LowerVecReduce()
10660 case ISD::VECREDUCE_MUL: in LowerOperation()