Searched refs:VDUPLANE (Results 1 – 3 of 3) sorted by relevance
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 200 VDUPLANE, enumerator
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H A D | ARMISelLowering.cpp | 1792 MAKE_CASE(ARMISD::VDUPLANE) in getTargetNodeName() 8066 N = DAG.getNode(ARMISD::VDUPLANE, dl, VT, in LowerBUILD_VECTOR() 8071 N = DAG.getNode(ARMISD::VDUPLANE, dl, VT, in LowerBUILD_VECTOR() 8512 return DAG.getNode(ARMISD::VDUPLANE, dl, VT, in GeneratePerfectShuffle() 8857 return DAG.getNode(ARMISD::VDUPLANE, dl, VT, V1, in LowerVECTOR_SHUFFLE() 16413 if (User->getOpcode() != ARMISD::VDUPLANE || in CombineVLDDUP() 18914 case ARMISD::VDUPLANE: return PerformVDUPLANECombine(N, DCI, Subtarget); in PerformDAGCombine()
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H A D | ARMInstrInfo.td | 257 // VDUPLANE can produce a quad-register result from a double-register source, 259 def ARMvduplane : SDNode<"ARMISD::VDUPLANE",
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