Searched refs:VCVT (Results 1 – 13 of 13) sorted by relevance
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86SchedSapphireRapids.td | 872 "^VCVT(T?)PD2(U?)DQZ128rm((b|k|bk|kz)?)$", 873 "^VCVT(T?)PD2(U?)DQZ128rmbkz$", 875 "^VCVT(U?)QQ2PSZ128rm((b|k|bk|kz)?)$", 876 "^VCVT(U?)QQ2PSZ128rmbkz$")>; 879 "^VCVT(U?)SI642SSZrm((_Int)?)$")>; 887 def : InstRW<[SPRWriteResGroup38, ReadAfterVecLd], (instregex "^VCVT(T?)SD2SIZrm$", 888 "^VCVT(T?)SD2(U?)SIZrm_Int$")>; 895 def : InstRW<[SPRWriteResGroup39], (instregex "^VCVT(T?)PS2(U?)QQZ256rr((k|kz)?)$", 896 "^VCVT(U?)QQ2PSZ256rr((k|kz)?)$")>; 899 "^VCVT(U?)SI2SSZrr$", [all …]
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H A D | X86SchedSkylakeServer.td | 1405 "VCVT(T?)SS2USI64Zrr")>; 1864 "VCVT(T?)PD2QQ(Z|Z256)rm(b?)", 1865 "VCVT(T?)PD2UQQ(Z|Z256)rm(b?)", 1866 "VCVT(T?)PS2DQYrm", 1867 "VCVT(T?)PS2DQ(Z|Z256)rm(b?)", 1868 "VCVT(T?)PS2QQZ256rm(b?)", 1869 "VCVT(T?)PS2UDQ(Z|Z256)rm(b?)", 1870 "VCVT(T?)PS2UQQZ256rm(b?)", 1958 def: InstRW<[SKXWriteResGroup176], (instregex "VCVT(T?)SD2USIZrm(b?)", 1959 "VCVT(T?)SS2USI64Zrm(b?)")>; [all …]
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H A D | X86SchedIceLake.td | 1416 "VCVT(T?)SS2USI64Zrr")>; 1881 "VCVT(T?)PD2QQ(Z|Z256)rm(b?)", 1882 "VCVT(T?)PD2UQQ(Z|Z256)rm(b?)", 1883 "VCVT(T?)PS2DQYrm", 1884 "VCVT(T?)PS2DQ(Z|Z256)rm(b?)", 1885 "VCVT(T?)PS2QQZ256rm(b?)", 1886 "VCVT(T?)PS2UDQ(Z|Z256)rm(b?)", 1887 "VCVT(T?)PS2UQQZ256rm(b?)", 1975 def: InstRW<[ICXWriteResGroup176], (instregex "VCVT(T?)SD2USIZrm(b?)", 1976 "VCVT(T?)SS2USI64Zrm(b?)")>; [all …]
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H A D | X86ScheduleZnver1.td | 1154 def : InstRW<[ZnWriteCVTPD2DQr], (instregex "VCVT(T?)PD2DQYrr")>; 1156 def : InstRW<[ZnWriteCVTPD2DQLd], (instregex "VCVT(T?)PD2DQYrm")>;
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H A D | X86ScheduleZnver2.td | 1158 def : InstRW<[Zn2WriteCVTPD2DQr], (instregex "VCVT(T?)PD2DQYrr")>; 1160 def : InstRW<[Zn2WriteCVTPD2DQLd], (instregex "VCVT(T?)PD2DQYrm")>;
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMScheduleA57.td | 733 "VCVT(A|N|P|M)(SH|UH|SS|US|SD|UD)", "VCVT(BDH|THD|TDH)")>; 1160 "VCVT(f2sd|f2ud|s2fd|u2fd|f2sq|f2uq|s2fq|u2fq|f2xsd|f2xud|xs2fd|xu2fd)", 1161 "VCVT(f2xsq|f2xuq|xs2fq|xu2fq)", 1162 "VCVT(AN|MN|NN|PN)(SDf|SQf|UDf|UQf|SDh|SQh|UDh|UQh)")>; 1166 "VCVT(h2sd|h2ud|s2hd|u2hd|h2sq|h2uq|s2hq|u2hq|h2xsd|h2xud|xs2hd|xu2hd)", 1167 "VCVT(h2xsq|h2xuq|xs2hq|xu2hq)", 1168 "VCVT(f2h|h2f)")>;
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H A D | ARMScheduleM55.td | 451 def : InstRW<[M55WriteFloatE3], (instregex "VCVT(A|M|N|P|R|X|Z)(S|U)(H|S|D)")>; 452 def : InstRW<[M55WriteFloatE3], (instregex "VCVT(B|T)(DH|HD)")>;
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H A D | ARMScheduleR52.td | 796 (instregex "VCVT", "VSITO", "VUITO", "VTO")>;
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H A D | ARMScheduleSwift.td | 623 def : InstRW<[SwiftWriteP1FourCycle], (instregex "VCVT", "V(S|U)IT", "VTO(S|U)")>;
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H A D | ARMInstrNEON.td | 6790 // VCVT : Vector Convert Between Floating-Point and Integers 6835 // VCVT{A, N, P, M} 6867 // VCVT : Vector Convert Between Floating-Point and Fixed-Point. 6947 // VCVT : Vector Convert Between Half-Precision and Single-Precision.
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H A D | ARMInstrVFP.td | 131 // The VCVT to/from fixed-point instructions encode the 'fbits' operand
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H A D | ARMISelLowering.cpp | 8127 if (SDValue VCVT = LowerBuildVectorOfFPTrunc(Op, DAG, Subtarget)) in LowerBUILD_VECTOR() local 8128 return VCVT; in LowerBUILD_VECTOR() 8129 if (SDValue VCVT = LowerBuildVectorOfFPExt(Op, DAG, Subtarget)) in LowerBUILD_VECTOR() local 8130 return VCVT; in LowerBUILD_VECTOR()
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H A D | ARMInstrMVE.td | 4071 // The unsuffixed VCVT for float->int implicitly rounds toward zero, 4077 // Whereas VCVT for int->float rounds to nearest
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