Searched refs:VALIGN (Results 1 – 11 of 11) sorted by relevance
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.h | 113 VALIGN, // Align two vectors (in Op0, Op1) to one that would have enumerator
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H A D | HexagonISelLowering.cpp | 1956 case HexagonISD::VALIGN: return "HexagonISD::VALIGN"; in getTargetNodeName() 3249 SDValue Aligned = DAG.getNode(HexagonISD::VALIGN, dl, LoadTy, in LowerUnalignedLoad()
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H A D | HexagonISelDAGToDAG.cpp | 1042 case HexagonISD::VALIGN: return SelectVAlign(N); in Select()
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H A D | HexagonISelLoweringHVX.cpp | 944 HalfV = DAG.getNode(HexagonISD::VALIGN, dl, VecTy, in buildHvxVectorReg()
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H A D | HexagonPatterns.td | 98 def HexagonVALIGN: SDNode<"HexagonISD::VALIGN", SDTVecVecIntOp>;
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86SchedSapphireRapids.td | 664 "^VALIGN(D|Q)Z256rri((k|kz)?)$", 1364 "^VALIGN(D|Q)Z128rri((k|kz)?)$", 2032 "^VALIGN(D|Q)Z128rm(bi|ik)$", 2033 "^VALIGN(D|Q)Z128rmbik(z?)$", 2034 "^VALIGN(D|Q)Z128rmi((kz)?)$")>; 2654 def : InstRW<[SPRWriteResGroup258, ReadAfterVecYLd], (instregex "^VALIGN(D|Q)Z((256)?)rm(bi|ik)$", 2655 "^VALIGN(D|Q)Z((256)?)rmbik(z?)$", 2656 "^VALIGN(D|Q)Z((256)?)rmi((kz)?)$",
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H A D | X86ISelLowering.h | 446 VALIGN, enumerator
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H A D | X86InstrFragmentsSIMD.td | 379 def X86VAlign : SDNode<"X86ISD::VALIGN", SDTShuff3OpI>;
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H A D | X86SchedSkylakeServer.td | 1678 def: InstRW<[SKXWriteResGroup136], (instregex "VALIGN(D|Q)Z128rm(b?)i",
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H A D | X86SchedIceLake.td | 1693 def: InstRW<[ICXWriteResGroup136], (instregex "VALIGN(D|Q)Z128rm(b?)i",
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H A D | X86ISelLowering.cpp | 2702 case X86ISD::VALIGN: in isTargetShuffle() 5311 case X86ISD::VALIGN: in getTargetShuffleMask() 11517 return DAG.getNode(X86ISD::VALIGN, DL, VT, Lo, Hi, in lowerShuffleAsVALIGN() 11535 return DAG.getNode(X86ISD::VALIGN, DL, VT, Src, in lowerShuffleAsVALIGN() 11544 return DAG.getNode(X86ISD::VALIGN, DL, VT, in lowerShuffleAsVALIGN() 33837 NODE_NAME_CASE(VALIGN) in getTargetNodeName() 38338 Shuffle = X86ISD::VALIGN; in matchBinaryPermuteShuffle() 57865 case X86ISD::VALIGN: in PerformDAGCombine()
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