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/freebsd/crypto/openssl/crypto/modes/asm/
H A Dghash-riscv64-zvkb-zvbc.pl69 my ($V0,$V1,$V2,$V3,$V4,$V5,$V6) = ("v0","v1","v2","v3","v4","v5","v6");
85 @{[vlse64_v $V1, $H, $TMP0]} # vlse64.v v1, (a1), t0
89 @{[vsrl_vx $V3, $V1, $TMP1]} # vsrl.vx v3, v1, t1
90 @{[vsll_vi $V1, $V1, 1]} # vsll.vi v1, v1, 1
101 @{[vor_vv_v0t $V1, $V1, $V4]} # vor.vv v1, v1, v4, v0.t
109 @{[vxor_vv_v0t $V1, $V1, $V2]} # vxor.vv v1, v1, v2, v0.t
111 @{[vse64_v $V1, $Htable]} # vse64.v v1, (a0)
125 my ($V0,$V1,$V2,$V3,$V4,$V5,$V6) = ("v0","v1","v2","v3","v4","v5","v6");
161 @{[vclmul_vx $V1, $V5, $TMP0]} # vclmul.vx v1, v5, t0
185 @{[vxor_vv_v0t $V1, $V1, $V5]} # vxor.vv v1, v1, v5, v0.t
[all …]
H A Daes-gcm-riscv64-zvkb-zvkg-zvkned.pl89 my ($V0, $V1, $V2, $V3, $V4, $V5, $V6, $V7,
99 @{[vaesz_vs $V28, $V1]}
125 @{[vaesz_vs $V28, $V1]}
163 @{[vaesz_vs $V28, $V1]}
245 @{[vle32_v $V1, $KEYP]}
296 @{[vle32_v $V1, $KEYP]}
354 @{[vle32_v $V1, $KEYP]}
584 @{[vle32_v $V1, $TMP_REG]}
588 @{[vgmul_vv $V0, $V1]}
595 @{[vghsh_vv $V0, $V1, $V4]}
/freebsd/crypto/openssl/crypto/aes/asm/
H A Daes-riscv64-zvkned.pl61 my ($V0, $V1, $V2, $V3, $V4, $V5, $V6, $V7,
73 @{[vle32_v $V1, $KEYP]}
105 @{[vle32_v $V1, $KEYP]}
141 @{[vle32_v $V1, $KEYP]}
178 @{[vaesz_vs $V24, $V1]} # with round key w[ 0, 3]
207 @{[vaesdf_vs $V24, $V1]} # with round key w[ 0, 3]
216 @{[vaesz_vs $V24, $V1]} # with round key w[ 0, 3]
249 @{[vaesdf_vs $V24, $V1]} # with round key w[ 0, 3]
258 @{[vaesz_vs $V24, $V1]} # with round key w[ 0, 3]
295 @{[vaesdf_vs $V24, $V1]} # with round key w[ 0, 3]
[all …]
H A Daes-riscv64-zvkb-zvkned.pl74 my ($V0, $V1, $V2, $V3, $V4, $V5, $V6, $V7,
144 @{[vle32_v $V1, $KEYP]}
186 @{[vaesz_vs $V24, $V1]}
216 @{[vle32_v $V1, $KEYP]}
262 @{[vaesz_vs $V24, $V1]}
294 @{[vle32_v $V1, $KEYP]}
344 @{[vaesz_vs $V24, $V1]}
H A Daes-riscv64-zvbb-zvkg-zvkned.pl76 my ($V0, $V1, $V2, $V3, $V4, $V5, $V6, $V7,
275 @{[vle32_v $V1, $KEY1]}
305 @{[vle32_v $V1, $KEY1]}
342 @{[vaesz_vs $V24, $V1]}
371 @{[vaesdf_vs $V24, $V1]}
380 @{[vaesz_vs $V24, $V1]}
417 @{[vaesdf_vs $V24, $V1]}
/freebsd/crypto/openssl/crypto/sha/asm/
H A Dsha256-riscv64-zvkb-zvknha_or_zvknhb.pl63 my ($V0, $V1, $V2, $V3, $V4, $V5, $V6, $V7,
161 @{[vle32_v $V1, $INP]}
162 @{[vrev8_v $V1, $V1]}
175 @{[vadd_vv $V5, $V10, $V1]}
179 @{[vsha2ms_vv $V1, $V5, $V4]} # Generate W[19:16]
186 @{[vsha2ms_vv $V2, $V5, $V1]} # Generate W[23:20]
192 @{[vmerge_vvm $V5, $V1, $V4, $V0]}
199 @{[vmerge_vvm $V5, $V2, $V1, $V0]}
203 @{[vadd_vv $V5, $V14, $V1]}
207 @{[vsha2ms_vv $V1, $V5, $V4]} # Generate W[35:32]
[all …]
H A Dsha512-riscv64-zvkb-zvknhb.pl63 my ($V0, $V1, $V2, $V3, $V4, $V5, $V6, $V7,
94 @{[vmv_v_x $V1, $INDEX_PATTERN]}
100 @{[vluxei8_v $V22, $H, $V1]}
101 @{[vluxei8_v $V24, $H2, $V1]}
210 @{[vsuxei8_v $V22, ($H), $V1]}
211 @{[vsuxei8_v $V24, ($H2), $V1]}
/freebsd/sys/contrib/device-tree/Bindings/hwmon/
H A Dltc2990.txt13 0: V1, V2, TR2
14 1: V1-V2, TR2
15 2: V1-V2, V3, V4
19 6: V1-V2, V3-V4
20 7: V1, V2, V3, V4
26 1: TR1, V1 or V1-V2 only per mode
35 lltc,meas-mode = <7 3>; /* V1, V2, V3, V4 */
/freebsd/contrib/llvm-project/llvm/include/llvm/IR/
H A DInstrTypes.h221 static BinaryOperator *Create##OPC(Value *V1, Value *V2, \
223 return Create(Instruction::OPC, V1, V2, Name);\
227 static BinaryOperator *Create##OPC(Value *V1, Value *V2, \
229 return Create(Instruction::OPC, V1, V2, Name, BB);\
233 static BinaryOperator *Create##OPC(Value *V1, Value *V2, \
235 return Create(Instruction::OPC, V1, V2, Name, I);\
239 static BinaryOperator *Create##OPC(Value *V1, Value *V2, \
241 return Create(Instruction::OPC, V1, V2, Name, It);\
246 CreateWithCopiedFlags(BinaryOps Opc, Value *V1, Value *V2, Value *CopyO,
249 BinaryOperator *BO = Create(Opc, V1, V2, Name, InsertBefore);
[all …]
H A DConstantFold.h40 Constant *V1, Constant *V2);
44 Constant *ConstantFoldShuffleVectorInstruction(Constant *V1, Constant *V2,
51 Constant *ConstantFoldBinaryInstruction(unsigned Opcode, Constant *V1,
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZInstrFormats.td1147 bits<5> V1;
1152 let Inst{39-36} = V1{3-0};
1156 let Inst{11} = V1{4};
1166 bits<5> V1;
1172 let Inst{39-36} = V1{3-0};
1177 let Inst{11} = V1{4};
1187 bits<5> V1;
1193 let Inst{39-36} = V1{3-0};
1197 let Inst{11} = V1{4};
1208 bits<5> V1;
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/marvell/
H A Darmada-3720-db.dts72 /* Gigabit module on CON19(V2.0)/CON21(V1.4) */
81 /* Gigabit module on CON18(V2.0)/CON20(V1.4) */
129 /* CON15(V2.0)/CON17(V1.4) : PCIe / CON15(V2.0)/CON12(V1.4) :mini-PCIe */
151 /* SD slot module on CON14(V2.0)/CON15(V1.4) */
195 * Exported on the micro USB connector CON30(V2.0)/CON32(V1.4) through
196 * an FTDI (also on CON24(V2.0)/CON26(V1.4)).
204 /* CON26(V2.0)/CON28(V1.4) */
211 /* CON27(V2.0)/CON29(V1.4) */
216 /* CON29(V2.0)/CON31(V1.4) */
/freebsd/contrib/llvm-project/compiler-rt/lib/orc/tests/unit/
H A Derror_test.cpp26 CustomError(int V1) : V1(V1) {} in CustomError() argument
28 return "CustomError V1 = " + std::to_string(V1); in toString()
30 int getV1() const { return V1; } in getV1()
33 int V1; member in __anon1f598db00111::CustomError
38 CustomSubError(int V1, std::string V2) in CustomSubError() argument
39 : RTTIExtends<CustomSubError, CustomError>(V1), V2(std::move(V2)) {} in CustomSubError()
41 return "CustomSubError V1 = " + std::to_string(V1) + ", " + V2; in toString()
/freebsd/contrib/llvm-project/llvm/lib/Support/
H A DFileUtilities.cpp90 double V1 = 0.0, V2 = 0.0; in CompareNumbers() local
108 V1 = strtod(F1P, const_cast<char**>(&F1NumEnd)); in CompareNumbers()
117 V1 = strtod(&StrTmp[0], const_cast<char**>(&F1NumEnd)); in CompareNumbers()
144 if (AbsTolerance < std::abs(V1-V2)) { in CompareNumbers()
148 Diff = std::abs(V1/V2 - 1.0); in CompareNumbers()
149 else if (V1) in CompareNumbers()
150 Diff = std::abs(V2/V1 - 1.0); in CompareNumbers()
156 << "Compared: " << V1 << " and " << V2 << '\n' in CompareNumbers()
157 << "abs. diff = " << std::abs(V1-V2) << " rel.diff = " << Diff << '\n' in CompareNumbers()
/freebsd/contrib/llvm-project/llvm/include/llvm/ADT/
H A DAPSInt.h357 inline bool operator==(int64_t V1, const APSInt &V2) { return V2 == V1; }
358 inline bool operator!=(int64_t V1, const APSInt &V2) { return V2 != V1; }
359 inline bool operator<=(int64_t V1, const APSInt &V2) { return V2 >= V1; }
360 inline bool operator>=(int64_t V1, const APSInt &V2) { return V2 <= V1; }
361 inline bool operator<(int64_t V1, const APSInt &V2) { return V2 > V1; }
362 inline bool operator>(int64_t V1, const APSInt &V2) { return V2 < V1; }
H A DEquivalenceClasses.h238 member_iterator unionSets(const ElemTy &V1, const ElemTy &V2) { in unionSets() argument
239 iterator V1I = insert(V1), V2I = insert(V2); in unionSets()
264 bool isEquivalent(const ElemTy &V1, const ElemTy &V2) const { in isEquivalent() argument
266 if (V1 == V2) in isEquivalent()
268 auto It = findLeader(V1); in isEquivalent()
/freebsd/contrib/llvm-project/llvm/lib/IR/
H A DConstantFold.cpp268 Constant *V1, Constant *V2) { in ConstantFoldSelectInstruction() argument
271 if (Cond->isAllOnesValue()) return V1; in ConstantFoldSelectInstruction()
280 Constant *V1Element = ConstantExpr::getExtractElement(V1, in ConstantFoldSelectInstruction()
304 return PoisonValue::get(V1->getType()); in ConstantFoldSelectInstruction()
307 if (isa<UndefValue>(V1)) return V1; in ConstantFoldSelectInstruction()
311 if (V1 == V2) return V1; in ConstantFoldSelectInstruction()
313 if (isa<PoisonValue>(V1)) in ConstantFoldSelectInstruction()
316 return V1; in ConstantFoldSelectInstruction()
339 if (isa<UndefValue>(V1) && NotPoison(V2)) return V2; in ConstantFoldSelectInstruction()
340 if (isa<UndefValue>(V2) && NotPoison(V1)) return V1; in ConstantFoldSelectInstruction()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DBitTracker.cpp440 const BitValue &V1 = A1[I]; in eADD() local
442 if (!V1.num() || !V2.num()) in eADD()
444 unsigned S = bool(V1) + bool(V2) + Carry; in eADD()
449 const BitValue &V1 = A1[I]; in eADD() local
453 if (V1.is(Carry)) in eADD()
456 Res[I] = BitValue::ref(V1); in eADD()
473 const BitValue &V1 = A1[I]; in eSUB() local
475 if (!V1.num() || !V2.num()) in eSUB()
477 unsigned S = bool(V1) - bool(V2) - Borrow; in eSUB()
482 const BitValue &V1 = A1[I]; in eSUB() local
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Transforms/ObjCARC/
H A DProvenanceAnalysisEvaluator.cpp49 for (Value *V1 : Values) { in run()
50 StringRef NameV1 = getName(V1); in run()
56 if (PA.related(V1, V2)) in run()
/freebsd/contrib/one-true-awk/testdir/
H A Dres.p6 H below R2.V1
8 R4: ring put N at 1 with .V1 at R3.V3
11 R5: ring with .V1 at R4.V3
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/
H A DVectorCombine.cpp542 Value *V0 = Ext0->getVectorOperand(), *V1 = Ext1->getVectorOperand(); in foldExtExtCmp() local
543 Value *VecCmp = Builder.CreateCmp(Pred, V0, V1); in foldExtExtCmp()
560 Value *V0 = Ext0->getVectorOperand(), *V1 = Ext1->getVectorOperand(); in foldExtExtBinop() local
562 Builder.CreateBinOp(cast<BinaryOperator>(&I)->getOpcode(), V0, V1); in foldExtExtBinop()
586 Value *V0, *V1; in foldExtractExtract() local
589 !match(I1, m_ExtractElt(m_Value(V1), m_ConstantInt(C1))) || in foldExtractExtract()
590 V0->getType() != V1->getType()) in foldExtractExtract()
698 Value *V0, *V1; in foldBitcastShuffle() local
701 m_Shuffle(m_Value(V0), m_Value(V1), m_Mask(Mask)))))) in foldBitcastShuffle()
719 bool IsUnary = isa<UndefValue>(V1); in foldBitcastShuffle()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchISelLowering.cpp465 MVT VT, SDValue V1, SDValue V2, in lowerVECTOR_SHUFFLE_VREPLVEI() argument
481 return DAG.getNode(LoongArchISD::VREPLVEI, DL, VT, V1, in lowerVECTOR_SHUFFLE_VREPLVEI()
507 MVT VT, SDValue V1, SDValue V2, in lowerVECTOR_SHUFFLE_VSHUF4I() argument
550 return DAG.getNode(LoongArchISD::VSHUF4I, DL, VT, V1, in lowerVECTOR_SHUFFLE_VSHUF4I()
570 MVT VT, SDValue V1, SDValue V2, in lowerVECTOR_SHUFFLE_VPACKEV() argument
575 SDValue OriV1 = V1, OriV2 = V2; in lowerVECTOR_SHUFFLE_VPACKEV()
578 V1 = OriV1; in lowerVECTOR_SHUFFLE_VPACKEV()
580 V1 = OriV2; in lowerVECTOR_SHUFFLE_VPACKEV()
591 return DAG.getNode(LoongArchISD::VPACKEV, DL, VT, V2, V1); in lowerVECTOR_SHUFFLE_VPACKEV()
610 MVT VT, SDValue V1, SDValue V2, in lowerVECTOR_SHUFFLE_VPACKOD() argument
[all …]
/freebsd/contrib/llvm-project/llvm/include/llvm/Analysis/
H A DAliasAnalysis.h360 AliasResult alias(const Value *V1, LocationSize V1Size, const Value *V2,
362 return alias(MemoryLocation(V1, V1Size), MemoryLocation(V2, V2Size));
366 AliasResult alias(const Value *V1, const Value *V2) {
367 return alias(MemoryLocation::getBeforeOrAfter(V1),
378 bool isNoAlias(const Value *V1, LocationSize V1Size, const Value *V2,
380 return isNoAlias(MemoryLocation(V1, V1Size), MemoryLocation(V2, V2Size));
384 bool isNoAlias(const Value *V1, const Value *V2) {
385 return isNoAlias(MemoryLocation::getBeforeOrAfter(V1),
396 bool isMustAlias(const Value *V1, const Value *V2) {
397 return alias(V1, LocationSize::precise(1), V2, LocationSize::precise(1)) ==
[all …]
H A DInstSimplifyFolder.h107 Value *FoldShuffleVector(Value *V1, Value *V2, in FoldShuffleVector() argument
110 cast<VectorType>(V1->getType())->getElementType(), Mask.size(), in FoldShuffleVector()
111 isa<ScalableVectorType>(V1->getType())); in FoldShuffleVector()
112 return simplifyShuffleVectorInst(V1, V2, Mask, RetTy, SQ); in FoldShuffleVector()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsMachineFunction.cpp85 Register V1 = RegInfo.createVirtualRegister(RC); in initGlobalBaseReg()
97 BuildMI(MBB, I, DL, TII.get(Mips::DADDu), V1).addReg(V0) in initGlobalBaseReg()
99 BuildMI(MBB, I, DL, TII.get(Mips::DADDiu), GlobalBaseReg).addReg(V1) in initGlobalBaseReg()
126 BuildMI(MBB, I, DL, TII.get(Mips::ADDu), V1).addReg(V0).addReg(Mips::T9); in initGlobalBaseReg()
127 BuildMI(MBB, I, DL, TII.get(Mips::ADDiu), GlobalBaseReg).addReg(V1) in initGlobalBaseReg()
84 Register V1 = RegInfo.createVirtualRegister(RC); initGlobalBaseReg() local

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