Searched refs:UxtOp (Results 1 – 1 of 1) sorted by relevance
111 unsigned StrexOp, unsigned UxtOp,1808 unsigned UxtOp, in ExpandCMP_SWAP() argument1826 assert((UxtOp == 0 || UxtOp == ARM::tUXTB || UxtOp == ARM::tUXTH) && in ExpandCMP_SWAP()1828 assert((UxtOp == 0 || ARM::tGPRRegClass.contains(DesiredReg)) && in ExpandCMP_SWAP()1841 if (UxtOp) { in ExpandCMP_SWAP()1843 BuildMI(MBB, MBBI, DL, TII->get(UxtOp), DesiredReg) in ExpandCMP_SWAP()