Searched refs:UseOpc (Results 1 – 10 of 10) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PostLegalizerCombiner.cpp | 175 unsigned UseOpc = UseMI.getOpcode(); in matchAArch64MulConstCombine() local
176 if (UseOpc == TargetOpcode::G_ADD || UseOpc == TargetOpcode::G_PTR_ADD || in matchAArch64MulConstCombine()
177 UseOpc == TargetOpcode::G_SUB) in matchAArch64MulConstCombine()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelDAGToDAG.cpp | 1332 unsigned UseOpc = U->getMachineOpcode(); in ppHoistZextI1() local
1334 If0 = SDValue(DAG.getMachineNode(UseOpc, dl, UVT, Ops), 0); in ppHoistZextI1()
1336 If1 = SDValue(DAG.getMachineNode(UseOpc, dl, UVT, Ops), 0); in ppHoistZextI1()
1338 unsigned UseOpc = U->getOpcode(); in ppHoistZextI1() local
1340 If0 = DAG.getNode(UseOpc, dl, UVT, Ops); in ppHoistZextI1()
1342 If1 = DAG.getNode(UseOpc, dl, UVT, Ops); in ppHoistZextI1()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 3189 unsigned UseOpc = UseMI.getOpcode(); in foldImmediate() local
3194 switch (UseOpc) { in foldImmediate()
3205 switch (UseOpc) { in foldImmediate()
3209 if (UseOpc == ARM::SUBrr && Commute) in foldImmediate()
3215 NewUseOpc = UseOpc == ARM::ADDrr ? ARM::ADDri : ARM::SUBri; in foldImmediate()
3218 NewUseOpc = UseOpc == ARM::ADDrr ? ARM::SUBri : ARM::ADDri; in foldImmediate()
3230 switch (UseOpc) { in foldImmediate()
3238 if (UseOpc == ARM::t2SUBrr && Commute) in foldImmediate()
3247 NewUseOpc = UseOpc == ARM::t2ADDrr ? t2ADD : t2SUB; in foldImmediate()
3250 NewUseOpc = UseOpc == ARM::t2ADDrr ? t2SUB : t2ADD; in foldImmediate()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIFoldOperands.cpp | 1355 unsigned UseOpc = UseMI->getOpcode(); in foldOperand() local
1356 if (UseOpc == AMDGPU::V_READFIRSTLANE_B32 || in foldOperand()
1357 (UseOpc == AMDGPU::V_READLANE_B32 && in foldOperand()
1359 AMDGPU::getNamedOperandIdx(UseOpc, AMDGPU::OpName::src0))) { in foldOperand()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrInfo.cpp | 727 unsigned UseOpc = UseMI.getOpcode(); in foldImmediate() local
732 switch (UseOpc) { in foldImmediate()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 4635 unsigned UseOpc = CompareUseMI.getOpcode(); in simplifyToLI() local
4636 if (UseOpc != PPC::ISEL && UseOpc != PPC::ISEL8) in simplifyToLI()
4647 CompareUseMI.setDesc(get(UseOpc == PPC::ISEL8 ? PPC::LI8 : PPC::LI)); in simplifyToLI()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelLowering.cpp | 775 unsigned UseOpc = Op->user_begin()->getOpcode(); in lowerSELECT() local
776 if (isBinOp(UseOpc) && DAG.isSafeToSpeculativelyExecute(UseOpc)) { in lowerSELECT()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 23510 unsigned UseOpc = N->user_begin()->getOpcode(); in performPostLD1Combine() local
23511 if (UseOpc == ISD::FMUL || UseOpc == ISD::FMA) in performPostLD1Combine()
26703 unsigned UseOpc = N->user_begin()->getOpcode(); in performSHLCombine() local
26704 if (UseOpc == ISD::ADD || UseOpc == ISD::SUB || UseOpc == ISD::SETCC || in performSHLCombine()
26705 UseOpc == AArch64ISD::ADDS || UseOpc == AArch64ISD::SUBS) in performSHLCombine()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 9228 unsigned UseOpc = Op->user_begin()->getOpcode(); in lowerSELECT() local
9229 if (isBinOp(UseOpc) && DAG.isSafeToSpeculativelyExecute(UseOpc)) { in lowerSELECT()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 43557 unsigned UseOpc = Use->getOpcode(); in SimplifyDemandedVectorEltsForTargetNode() local
43558 return (UseOpc == X86ISD::VSHL || UseOpc == X86ISD::VSRL || in SimplifyDemandedVectorEltsForTargetNode()
43559 UseOpc == X86ISD::VSRA) && in SimplifyDemandedVectorEltsForTargetNode()
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