| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIFoldOperands.cpp | 96 unsigned UseOpIdx,
100 int UseOpIdx,
690 const MachineOperand &OpToFold, MachineInstr *UseMI, unsigned UseOpIdx, in tryToFoldACImm() argument
693 if (UseOpIdx >= Desc.getNumOperands()) in tryToFoldACImm()
696 if (!AMDGPU::isSISrcInlinableOperand(Desc, UseOpIdx)) in tryToFoldACImm()
699 uint8_t OpTy = Desc.operands()[UseOpIdx].OperandType; in tryToFoldACImm()
701 TII->isOperandLegal(*UseMI, UseOpIdx, &OpToFold)) { in tryToFoldACImm()
702 UseMI->getOperand(UseOpIdx).ChangeToImmediate(OpToFold.getImm()); in tryToFoldACImm()
718 MachineOperand &UseOp = UseMI->getOperand(UseOpIdx); in tryToFoldACImm()
722 TII->isOperandLegal(*UseMI, UseOpIdx, &DefOp)) { in tryToFoldACImm()
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| H A D | AMDGPUSubtarget.cpp | 868 SUnit *Def, int DefOpIdx, SUnit *Use, int UseOpIdx, SDep &Dep, in adjustSchedDependency() argument
908 DefI, DefOpIdx, UseI, UseOpIdx)); in adjustSchedDependency()
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| H A D | GCNSubtarget.h | 1569 void adjustSchedDependency(SUnit *Def, int DefOpIdx, SUnit *Use, int UseOpIdx,
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| H A D | SIInstrInfo.cpp | 5087 unsigned UseOpIdx; in verifyInstruction() local
5088 if (!MI.isRegTiedToUseOperand(StaticNumOps, &UseOpIdx) || in verifyInstruction()
5089 UseOpIdx != StaticNumOps + 1) { in verifyInstruction()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | InitUndef.cpp | 223 unsigned UseOpIdx; in processBasicBlock() local
224 if (MI.getNumDefs() != 0 && MI.isRegTiedToUseOperand(0, &UseOpIdx)) { in processBasicBlock()
225 MachineOperand &UseMO = MI.getOperand(UseOpIdx); in processBasicBlock()
228 TII->getRegClass(MI.getDesc(), UseOpIdx, TRI, MF); in processBasicBlock()
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| H A D | ScheduleDAGInstrs.cpp | 261 int UseOpIdx = I->OpIdx; in addPhysRegDataDeps() local
264 if (UseOpIdx < 0) { in addPhysRegDataDeps()
272 Register UseReg = UseInstr->getOperand(UseOpIdx).getReg(); in addPhysRegDataDeps()
274 ImplicitPseudoUse = UseOpIdx >= ((int)UseMIDesc.getNumOperands()) && in addPhysRegDataDeps()
281 UseInstr, UseOpIdx)); in addPhysRegDataDeps()
285 ST.adjustSchedDependency(SU, OperIdx, UseSU, UseOpIdx, Dep, &SchedModel); in addPhysRegDataDeps()
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| H A D | MachineVerifier.cpp | 2319 unsigned UseOpIdx; in visitMachineInstrBefore() local
2320 if (!MI->isRegTiedToUseOperand(Idx, &UseOpIdx)) { in visitMachineInstrBefore()
2324 if (UseOpIdx < FirstGCPtrIdx || UseOpIdx > LastGCPtrIdx) { in visitMachineInstrBefore()
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| H A D | RegisterCoalescer.cpp | 854 unsigned UseOpIdx; in removeCopyByCommutingDef() local
855 if (!DefMI->isRegTiedToUseOperand(DefIdx, &UseOpIdx)) in removeCopyByCommutingDef()
868 if (!TII->findCommutedOpIndices(*DefMI, UseOpIdx, NewDstIdx)) in removeCopyByCommutingDef()
902 TII->commuteInstruction(*DefMI, false, UseOpIdx, NewDstIdx); in removeCopyByCommutingDef()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64Subtarget.cpp | 483 SUnit *Def, int DefOpIdx, SUnit *Use, int UseOpIdx, SDep &Dep, in adjustSchedDependency() argument
507 Register Reg = UseMI->getOperand(UseOpIdx).getReg(); in adjustSchedDependency()
511 UseOpIdx = Op.getOperandNo(); in adjustSchedDependency()
518 SchedModel->computeOperandLatency(DefMI, DefOpIdx, UseMI, UseOpIdx)); in adjustSchedDependency()
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| H A D | AArch64Subtarget.h | 317 void adjustSchedDependency(SUnit *Def, int DefOpIdx, SUnit *Use, int UseOpIdx,
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | MachineInstr.h | 1653 unsigned *UseOpIdx = nullptr) const {
1657 if (UseOpIdx)
1658 *UseOpIdx = findTiedOperandIdx(DefOpIdx);
1665 bool isRegTiedToDefOperand(unsigned UseOpIdx,
1667 const MachineOperand &MO = getOperand(UseOpIdx);
1671 *DefOpIdx = findTiedOperandIdx(UseOpIdx);
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| H A D | TargetSubtargetInfo.h | 241 int UseOpIdx, SDep &Dep, in adjustSchedDependency() argument
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonSubtarget.h | 310 void adjustSchedDependency(SUnit *Def, int DefOpIdx, SUnit *Use, int UseOpIdx,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInsertVSETVLI.cpp | 187 unsigned UseOpIdx; in hasUndefinedMergeOp() local
188 if (!MI.isRegTiedToUseOperand(0, &UseOpIdx)) in hasUndefinedMergeOp()
195 const MachineOperand &UseMO = MI.getOperand(UseOpIdx); in hasUndefinedMergeOp()
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| H A D | RISCVInstrInfo.cpp | 2532 unsigned UseOpIdx; in verifyInstruction() local
2533 if (!MI.isRegTiedToUseOperand(0, &UseOpIdx)) { in verifyInstruction()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrInfo.cpp | 638 int UseOpIdx = in optimizeLoadInstr() local
640 assert(UseOpIdx != -1 && "Expected FoldAsLoadDefReg to be used by MI."); in optimizeLoadInstr()
644 foldMemoryOperand(MI, {((unsigned)UseOpIdx)}, *DefMI)) { in optimizeLoadInstr()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 3297 int UseOpIdx = MI.findRegisterUseOperandIdx(InUseReg, TRI, false); in replaceInstrOperandWithImm() local
3298 if (UseOpIdx >= 0) { in replaceInstrOperandWithImm()
3299 MachineOperand &MO = MI.getOperand(UseOpIdx); in replaceInstrOperandWithImm()
3308 MI.removeOperand(UseOpIdx); in replaceInstrOperandWithImm()
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