Searched refs:UncondBr (Results 1 – 5 of 5) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86SpeculativeLoadHardening.cpp | 146 MachineInstr *UncondBr; member
226 MachineInstr *Br, MachineInstr *&UncondBr, in splitEdge() argument
248 if (!UncondBr) { in splitEdge()
257 UncondBr = &*BrBuilder; in splitEdge()
267 assert(!UncondBr && in splitEdge()
648 Info.UncondBr = &MI; in collectBlockCondInfo()
663 Info.UncondBr = &MI; in collectBlockCondInfo()
702 MachineInstr *UncondBr = Info.UncondBr; in tracePredStateThroughCFG() local
711 UncondBr ? (UncondBr->getOpcode() == X86::JMP_1 in tracePredStateThroughCFG()
712 ? UncondBr->getOperand(0).getMBB() in tracePredStateThroughCFG()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/ |
| H A D | CSKYConstantIslandPass.cpp | 189 int UncondBr; member
192 : MI(Mi), MaxDisp(Maxdisp), IsCond(Cond), UncondBr(Ubr) {} in ImmBranch()
992 int UncondBr = CSKY::BR32; in createNewWater() local
993 auto *NewMI = BuildMI(UserMBB, DebugLoc(), TII->get(UncondBr)) in createNewWater()
996 unsigned MaxDisp = getUnconditionalBrDisp(UncondBr); in createNewWater()
998 ImmBranch(&UserMBB->back(), MaxDisp, false, UncondBr)); in createNewWater()
1353 BuildMI(MBB, DebugLoc(), TII->get(Br.UncondBr)).addMBB(DestBB); in fixupConditionalBr()
1355 unsigned MaxDisp = getUnconditionalBrDisp(Br.UncondBr); in fixupConditionalBr()
1356 ImmBranches.push_back(ImmBranch(&MBB->back(), MaxDisp, false, Br.UncondBr)); in fixupConditionalBr()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsConstantIslandPass.cpp | 327 int UncondBr; member
330 : MI(mi), MaxDisp(maxdisp), isCond(cond), UncondBr(ubr) {} in ImmBranch()
1232 int UncondBr = Mips::Bimm16; in createNewWater() local
1233 BuildMI(UserMBB, DebugLoc(), TII->get(UncondBr)).addMBB(NewMBB); in createNewWater()
1234 unsigned MaxDisp = getUnconditionalBrDisp(UncondBr); in createNewWater()
1236 MaxDisp, false, UncondBr)); in createNewWater()
1620 BuildMI(MBB, DebugLoc(), TII->get(Br.UncondBr)).addMBB(DestBB); in fixupConditionalBr()
1622 unsigned MaxDisp = getUnconditionalBrDisp(Br.UncondBr); in fixupConditionalBr()
1623 ImmBranches.push_back(ImmBranch(&MBB->back(), MaxDisp, false, Br.UncondBr)); in fixupConditionalBr()
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| H A D | MipsInstrInfo.cpp | 40 MipsInstrInfo::MipsInstrInfo(const MipsSubtarget &STI, unsigned UncondBr) in MipsInstrInfo() argument
42 Subtarget(STI), UncondBrOpc(UncondBr) {} in MipsInstrInfo()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMConstantIslandPass.cpp | 198 unsigned UncondBr; member
201 : MI(mi), MaxDisp(maxdisp), isCond(cond), UncondBr(ubr) {} in ImmBranch()
1398 int UncondBr = isThumb ? ((isThumb2) ? ARM::t2B : ARM::tB) : ARM::B; in createNewWater() local
1400 BuildMI(UserMBB, DebugLoc(), TII->get(UncondBr)).addMBB(NewMBB); in createNewWater()
1402 BuildMI(UserMBB, DebugLoc(), TII->get(UncondBr)) in createNewWater()
1405 unsigned MaxDisp = getUnconditionalBrDisp(UncondBr); in createNewWater()
1407 MaxDisp, false, UncondBr)); in createNewWater()
1774 BMI->getOpcode() == Br.UncondBr) { in fixupConditionalBr()
1823 BuildMI(MBB, DebugLoc(), TII->get(Br.UncondBr)) in fixupConditionalBr()
1827 BuildMI(MBB, DebugLoc(), TII->get(Br.UncondBr)).addMBB(DestBB); in fixupConditionalBr()
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