| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64AddressingModes.h | 41 UXTH,
61 case AArch64_AM::UXTH: return "uxth"; in getShiftExtendName()
128 case 1: return AArch64_AM::UXTH; in getExtendType()
155 case AArch64_AM::UXTH: return 1; break; in getExtendEncoding()
42 UXTH, global() enumerator
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64SchedPredicates.td | 19 def CheckExtUXTH : CheckImmOperand_s<3, "AArch64_AM::UXTH">;
|
| H A D | AArch64ExpandPseudoInsts.cpp | 1482 AArch64_AM::getArithExtendImm(AArch64_AM::UXTH, 0), in expandMI()
|
| H A D | AArch64ISelDAGToDAG.cpp | 829 return AArch64_AM::UXTH; in getExtendTypeForNode()
847 return !IsLoadStore ? AArch64_AM::UXTH : AArch64_AM::InvalidShiftExtend; in getExtendTypeForNode()
|
| H A D | AArch64InstrInfo.cpp | 957 case AArch64_AM::UXTH: in isFalkorShiftExtFast()
991 case AArch64_AM::UXTH: in isFalkorShiftExtFast()
|
| H A D | AArch64FastISel.cpp | 1182 ExtendType = IsZExt ? AArch64_AM::UXTH : AArch64_AM::SXTH; in emitAddSub()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/Utils/ |
| H A D | AArch64BaseInfo.h | 612 UXTH, enumerator
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMInstructionSelector.cpp | 303 STORE_OPCODE(ZEXT16, UXTH); in OpcodeCache()
|
| H A D | ARMFastISel.cpp | 2666 /* 16 bit zext */ { ARM::UXTH , 0, ARM_AM::no_shift, 0 } } in ARMEmitIntExt()
2906 { { ARM::UXTH, ARM::t2UXTH }, 0, 1, MVT::i16 },
|
| H A D | ARMScheduleR52.td | 215 (instregex "SXTB", "SXTH", "SXTB16", "UXTB", "UXTH", "UXTB16",
|
| H A D | ARMScheduleSwift.td | 161 (instregex "SXTB", "SXTH", "SXTB16", "UXTB", "UXTH", "UXTB16",
|
| H A D | ARMScheduleA57.td | 360 // Sign/zero extend, normal: SXTB, SXTH, UXTB, UXTH
|
| H A D | ARMInstrThumb.td | 1791 // restrict the register class for the UXTB/UXTH ops used in the expansion.
|
| H A D | ARMInstrInfo.td | 3786 def UXTH : AI_ext_rrot<0b01101111,
6162 def : ARMV6Pat<(and GPR:$Src, 0x0000FFFF), (UXTH GPR:$Src, 0)>;
6306 (UXTH GPRnopc:$Rd, GPRnopc:$Rm, 0, pred:$p)>;
|
| H A D | ARMExpandPseudoInsts.cpp | 3166 return ExpandCMP_SWAP(MBB, MBBI, ARM::LDREXH, ARM::STREXH, ARM::UXTH, in ExpandMI()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 1538 ET == AArch64_AM::UXTH || ET == AArch64_AM::SXTH || in isExtend()
1551 ET == AArch64_AM::UXTH || ET == AArch64_AM::SXTH || in isExtend64()
3597 .Case("uxth", AArch64_AM::UXTH) in tryParseOptionalShiftExtend()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 7616 return IsLoadStore ? AArch64_AM::InvalidShiftExtend : AArch64_AM::UXTH; in getExtendTypeForInst()
7639 return !IsLoadStore ? AArch64_AM::UXTH : AArch64_AM::InvalidShiftExtend; in getExtendTypeForInst()
|