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Searched refs:UPHY_PLL_S0_CTL1_PLL0_ENABLE (Results 1 – 1 of 1) sorted by relevance

/freebsd/sys/arm64/nvidia/tegra210/
H A Dtegra210_xusbpadctl.c269 #define UPHY_PLL_S0_CTL1_PLL0_ENABLE (1 << 3) macro
895 reg |= UPHY_PLL_S0_CTL1_PLL0_ENABLE; in uphy_sata_enable()